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Merge branch 'feat/esp_hal_sdmmc' into 'master'

Browse Source 
sd: esp_hal_sd component

Closes IDF-15167 and IDF-14096

See merge request espressif/esp-idf!45225
This commit is contained in:
Armando (Dou Yiwen)
2026-02-03 08:20:18 +00:00
parent cf7d387bb6 bb6ea458d2
commit 9040191fcc
59 changed files with 194 additions and 202 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_driver_sdio/CMakeLists.txt
+1
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@@ -17,5 +17,6 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
REQUIRES esp_hal_sd
PRIV_REQUIRES "${priv_requires}"
)
components/esp_driver_sdio/src/sdio_slave.c
+1 -1
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@@ -79,7 +79,7 @@ The driver of FIFOs works as below:
#include "soc/soc_memory_layout.h"
#include "soc/soc_caps.h"
#include "soc/sdio_slave_periph.h"
#include "hal/sdio_slave_periph.h"
#include "esp_cpu.h"
#include "esp_intr_alloc.h"
#include "esp_log.h"
components/esp_driver_sdmmc/CMakeLists.txt
+1 -1
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@@ -17,7 +17,7 @@ if(${target} STREQUAL "linux")
set(priv_requires esp_timer)
else()
set(requires esp_driver_sd_intf sdmmc)
set(priv_requires esp_timer esp_pm esp_mm esp_driver_gpio)
set(priv_requires esp_timer esp_pm esp_mm esp_driver_gpio esp_hal_sd)
endif()
idf_component_register(SRCS ${srcs}
components/esp_driver_sdmmc/legacy/src/sdmmc_internal.h
+1 -1
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@@ -11,7 +11,7 @@
#include "esp_err.h"
#include "freertos/FreeRTOS.h"
#include "freertos/queue.h"
#include "soc/sdmmc_periph.h"
#include "hal/sdmmc_periph.h"
#include "esp_private/sd_host_private.h"
esp_err_t sdmmc_host_reset(void);
components/esp_driver_sdmmc/src/sd_host_sdmmc.c
+1 -1
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@@ -16,7 +16,7 @@
#include "esp_memory_utils.h"
#include "soc/chip_revision.h"
#include "soc/sdmmc_pins.h"
#include "soc/sdmmc_periph.h"
#include "hal/sdmmc_periph.h"
#include "soc/soc_caps.h"
#include "hal/efuse_hal.h"
#include "hal/sd_types.h"
components/esp_hal_emac/CMakeLists.txt
+1 -1
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@@ -17,4 +17,4 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
REQUIRES soc hal)
REQUIRES soc hal esp_hal_gpio)
components/soc/esp32/include/soc/gpio_num.h → components/esp_hal_gpio/esp32/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c2/include/soc/gpio_num.h → components/esp_hal_gpio/esp32c2/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c3/include/soc/gpio_num.h → components/esp_hal_gpio/esp32c3/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c5/include/soc/gpio_num.h → components/esp_hal_gpio/esp32c5/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c6/include/soc/gpio_num.h → components/esp_hal_gpio/esp32c6/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c61/include/soc/gpio_num.h → components/esp_hal_gpio/esp32c61/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32h2/include/soc/gpio_num.h → components/esp_hal_gpio/esp32h2/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32h21/include/soc/gpio_num.h → components/esp_hal_gpio/esp32h21/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32h4/include/soc/gpio_num.h → components/esp_hal_gpio/esp32h4/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32p4/include/soc/gpio_num.h → components/esp_hal_gpio/esp32p4/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32s2/include/soc/gpio_num.h → components/esp_hal_gpio/esp32s2/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32s3/include/soc/gpio_num.h → components/esp_hal_gpio/esp32s3/include/soc/gpio_num.h
+1 -1
View File
@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32s31/include/soc/gpio_num.h → components/esp_hal_gpio/esp32s31/include/soc/gpio_num.h
+1 -1
View File
@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/linux/include/soc/gpio_num.h → components/esp_hal_gpio/linux/include/soc/gpio_num.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
/*
components/esp_hal_sd/CMakeLists.txt
+25
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@@ -0,0 +1,25 @@
idf_build_get_property(target IDF_TARGET)
if(${target} STREQUAL "linux")
return() # This component is not supported by the POSIX/Linux simulator
endif()
set(srcs)
set(public_include "include")
if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
list(APPEND public_include "${target}/include")
endif()
if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
list(APPEND srcs "sdmmc_hal.c")
list(APPEND srcs "${target}/sdmmc_periph.c")
endif()
if(CONFIG_SOC_SDIO_SLAVE_SUPPORTED)
list(APPEND srcs "sdio_slave_hal.c")
list(APPEND srcs "${target}/sdio_slave_periph.c")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
REQUIRES soc hal)
components/esp_hal_sd/README.md
+13
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@@ -0,0 +1,13 @@
# `esp_hal_sd`
⚠️ This HAL component is still under heavy development at the moment, so we don't guarantee the stability and backward-compatibility among versions.
The `esp_hal_sd` component provides a **Hardware Abstraction Layer** for
- SDMMC Host Controller
- SDIO Slave Controller
for all targets supported by ESP-IDF.
In a broad sense, the HAL layer consists of two sub-layers: HAL (upper) and Low-Level(bottom). The HAL layer defines the steps and data that is required to operate a peripheral (e.g. initialization, parameter settings). The low-level is a translation layer above the register files under the `soc` component, it only covers general conceptions to register configurations.
The functions in this file mainly provide hardware abstraction for IDF peripheral drivers. For advanced developers, the HAL layer functions can also be directly used to assist in implementing their own drivers. However, it needs to be mentioned again that the interfaces here do not guarantee stability.
components/hal/esp32/include/hal/sdio_slave_ll.h → components/esp_hal_sd/esp32/include/hal/sdio_slave_ll.h
View File
components/hal/esp32/include/hal/sdmmc_ll.h → components/esp_hal_sd/esp32/include/hal/sdmmc_ll.h
+2 -3
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@@ -94,7 +94,6 @@ typedef enum {
SDMMC_LL_DELAY_PHASE_3,
} sdmmc_ll_delay_phase_t;
/*---------------------------------------------------------------
Clock & Reset
---------------------------------------------------------------*/
@@ -442,11 +441,11 @@ static inline void sdmmc_ll_enable_ddr_mode(sdmmc_dev_t *hw, uint32_t slot, bool
{
uint32_t ddr_reg_val = HAL_FORCE_READ_U32_REG_FIELD(hw->uhs, ddr);
if (en) {
ddr_reg_val|= BIT(slot);
ddr_reg_val |= BIT(slot);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->uhs, ddr, ddr_reg_val);
hw->emmc_ddr_reg |= BIT(slot);
} else {
ddr_reg_val&= ~BIT(slot);
ddr_reg_val &= ~BIT(slot);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->uhs, ddr, ddr_reg_val);
hw->emmc_ddr_reg &= ~BIT(slot);
}
components/soc/esp32/include/soc/sdio_slave_pins.h → components/esp_hal_sd/esp32/include/soc/sdio_slave_pins.h
+1 -1
View File
@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32/include/soc/sdmmc_pins.h → components/esp_hal_sd/esp32/include/soc/sdmmc_pins.h
+6 -17
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@@ -1,19 +1,10 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
/*
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SOC_SDMMC_PINS_H_
#define _SOC_SDMMC_PINS_H_
#pragma once
#define SDMMC_SLOT0_IOMUX_PIN_NUM_CLK 6
#define SDMMC_SLOT0_IOMUX_PIN_NUM_CMD 11
@@ -34,5 +25,3 @@
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D2 12
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D3 13
#define SDMMC_SLOT1_FUNC 4
#endif /* _SOC_SDMMC_PINS_H_ */
components/soc/esp32/sdio_slave_periph.c → components/esp_hal_sd/esp32/sdio_slave_periph.c
+2 -2
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@@ -1,11 +1,11 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "soc/sdio_slave_periph.h"
#include "hal/sdio_slave_periph.h"
#include "soc/sdio_slave_pins.h"
/**
components/soc/esp32/sdmmc_periph.c → components/esp_hal_sd/esp32/sdmmc_periph.c
+3 -3
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@@ -1,10 +1,10 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/sdmmc_periph.h"
#include "hal/sdmmc_periph.h"
#include "soc/sdmmc_pins.h"
const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
components/hal/esp32c5/include/hal/sdio_slave_ll.h → components/esp_hal_sd/esp32c5/include/hal/sdio_slave_ll.h
View File
components/soc/esp32c5/include/soc/sdio_slave_pins.h → components/esp_hal_sd/esp32c5/include/soc/sdio_slave_pins.h
+1 -1
View File
@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c61/sdio_slave_periph.c → components/esp_hal_sd/esp32c5/sdio_slave_periph.c
+2 -2
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@@ -1,10 +1,10 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "soc/sdio_slave_periph.h"
#include "hal/sdio_slave_periph.h"
#include "soc/sdio_slave_pins.h"
const sdio_slave_slot_info_t sdio_slave_slot_info[1] = {
components/hal/esp32c6/include/hal/sdio_slave_ll.h → components/esp_hal_sd/esp32c6/include/hal/sdio_slave_ll.h
View File
components/soc/esp32c6/include/soc/sdio_slave_pins.h → components/esp_hal_sd/esp32c6/include/soc/sdio_slave_pins.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c6/sdio_slave_periph.c → components/esp_hal_sd/esp32c6/sdio_slave_periph.c
+2 -2
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@@ -1,10 +1,10 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "soc/sdio_slave_periph.h"
#include "hal/sdio_slave_periph.h"
#include "soc/sdio_slave_pins.h"
const sdio_slave_slot_info_t sdio_slave_slot_info[1] = {
components/hal/esp32c61/include/hal/sdio_slave_ll.h → components/esp_hal_sd/esp32c61/include/hal/sdio_slave_ll.h
-1
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@@ -40,7 +40,6 @@ extern "C" {
/// Get the mask of the interrupt status.
#define sdio_slave_ll_intr_status_mask (0xff | SDIO_SLC0_RX_DONE_INT_ST | SDIO_SLC0_RX_EOF_INT_ST | SDIO_SLC0_TX_DONE_INT_ST)
/*
* SLC2 DMA Desc struct, aka sdio_slave_ll_desc_t
*
components/soc/esp32c61/include/soc/sdio_slave_pins.h → components/esp_hal_sd/esp32c61/include/soc/sdio_slave_pins.h
+1 -1
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@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32c5/sdio_slave_periph.c → components/esp_hal_sd/esp32c61/sdio_slave_periph.c
+2 -2
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@@ -1,10 +1,10 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "soc/sdio_slave_periph.h"
#include "hal/sdio_slave_periph.h"
#include "soc/sdio_slave_pins.h"
const sdio_slave_slot_info_t sdio_slave_slot_info[1] = {
components/hal/esp32p4/include/hal/sdmmc_ll.h → components/esp_hal_sd/esp32p4/include/hal/sdmmc_ll.h
+14 -15
View File
@@ -26,7 +26,6 @@
#include "soc/lp_clkrst_struct.h"
#include "soc/pmu_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
@@ -286,8 +285,8 @@ static inline uint32_t sdmmc_ll_get_clock_div(sdmmc_dev_t *hw)
{
uint32_t div = 0;
if (HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_clk_edge_h == 0 &&
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_clk_edge_n == 0 &&
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_clk_edge_l == 0) {
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_clk_edge_n == 0 &&
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_clk_edge_l == 0) {
div = 1;
} else {
div = HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_clk_edge_l + 1;
@@ -333,18 +332,18 @@ static inline void sdmmc_ll_set_din_delay_phase(sdmmc_dev_t *hw, sdmmc_ll_delay_
{
if (mode == SDMMC_LL_SPEED_MODE_LS) {
switch (phase) {
case SDMMC_LL_DELAY_PHASE_1:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x1;
break;
case SDMMC_LL_DELAY_PHASE_2:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x2;
break;
case SDMMC_LL_DELAY_PHASE_3:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x3;
break;
default:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x0;
break;
case SDMMC_LL_DELAY_PHASE_1:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x1;
break;
case SDMMC_LL_DELAY_PHASE_2:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x2;
break;
case SDMMC_LL_DELAY_PHASE_3:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x3;
break;
default:
HP_SYS_CLKRST.peri_clk_ctrl02.reg_sdio_ls_sam_clk_edge_sel = 0x0;
break;
}
} else {
SDMMC.dll_clk_conf.dll_cclk_in_sam_phase = (phase << 3);
components/soc/esp32p4/include/soc/sdmmc_pins.h → components/esp_hal_sd/esp32p4/include/soc/sdmmc_pins.h
+3 -3
View File
@@ -1,7 +1,7 @@
/**
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
/*
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/soc/esp32p4/sdmmc_periph.c → components/esp_hal_sd/esp32p4/sdmmc_periph.c
+3 -3
View File
@@ -1,10 +1,10 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/sdmmc_periph.h"
#include "hal/sdmmc_periph.h"
#include "soc/sdmmc_pins.h"
const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
components/hal/esp32s3/include/hal/sdmmc_ll.h → components/esp_hal_sd/esp32s3/include/hal/sdmmc_ll.h
+14 -15
View File
@@ -248,18 +248,18 @@ static inline void sdmmc_ll_set_din_delay_phase(sdmmc_dev_t *hw, sdmmc_ll_delay_
{
(void)mode;
switch (phase) {
case SDMMC_LL_DELAY_PHASE_1:
hw->clock.phase_din = 0x1;
break;
case SDMMC_LL_DELAY_PHASE_2:
hw->clock.phase_din = 0x4;
break;
case SDMMC_LL_DELAY_PHASE_3:
hw->clock.phase_din = 0x6;
break;
default:
hw->clock.phase_din = 0x0;
break;
case SDMMC_LL_DELAY_PHASE_1:
hw->clock.phase_din = 0x1;
break;
case SDMMC_LL_DELAY_PHASE_2:
hw->clock.phase_din = 0x4;
break;
case SDMMC_LL_DELAY_PHASE_3:
hw->clock.phase_din = 0x6;
break;
default:
hw->clock.phase_din = 0x0;
break;
}
}
@@ -505,11 +505,11 @@ static inline void sdmmc_ll_enable_ddr_mode(sdmmc_dev_t *hw, uint32_t slot, bool
{
uint32_t ddr_reg_val = HAL_FORCE_READ_U32_REG_FIELD(hw->uhs, ddr);
if (en) {
ddr_reg_val|= BIT(slot);
ddr_reg_val |= BIT(slot);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->uhs, ddr, ddr_reg_val);
hw->emmc_ddr_reg |= BIT(slot);
} else {
ddr_reg_val&= ~BIT(slot);
ddr_reg_val &= ~BIT(slot);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->uhs, ddr, ddr_reg_val);
hw->emmc_ddr_reg &= ~BIT(slot);
}
@@ -767,7 +767,6 @@ static inline void sdmmc_ll_enable_global_interrupt(sdmmc_dev_t *hw, bool en)
hw->ctrl.int_enable = (uint32_t)en;
}
/**
* @brief Enable / disable busy clear interrupt
*
components/esp_hal_sd/esp32s3/include/soc/sdmmc_pins.h
+11
View File
@@ -0,0 +1,11 @@
/*
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
/* SDMMC pins on ESP32-S3 are configurable through GPIO matrix.
* This file is kept for compatibility only.
*/
components/soc/esp32s3/sdmmc_periph.c → components/esp_hal_sd/esp32s3/sdmmc_periph.c
+3 -3
View File
@@ -1,10 +1,10 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/sdmmc_periph.h"
#include "hal/sdmmc_periph.h"
#include "soc/sdmmc_pins.h"
const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS] = {
components/hal/include/hal/sd_types.h → components/esp_hal_sd/include/hal/sd_types.h
+8 -8
View File
@@ -21,18 +21,18 @@ typedef enum {
SD_BUS_WIDTH_8_BIT = 8, ///< 8 bit
} sd_bus_width_t;
/**
* @brief SD mode
*/
typedef enum {
/**
* @brief SD mode
*/
typedef enum {
SD_MODE_NORMAL, ///< Normal SD mode
SD_MODE_UHS1, ///< UHS-I SD mode
} sd_mode_t;
/**
* @brief SD sampling mode
*/
typedef enum {
/**
* @brief SD sampling mode
*/
typedef enum {
SD_SAMPLING_MODE_SDR = 1, ///< Single data rate mode
SD_SAMPLING_MODE_DDR, ///< Double data rate mode
} sd_sampling_mode_t;
components/hal/include/hal/sdio_slave_hal.h → components/esp_hal_sd/include/hal/sdio_slave_hal.h
-5
View File
@@ -156,7 +156,6 @@ extern "C" {
/// Space used for each sending descriptor. Should initialize the sendbuf according to this size.
#define SDIO_SLAVE_SEND_DESC_SIZE sizeof(sdio_slave_hal_send_desc_t)
/// Status of the sending part
typedef enum {
STATE_IDLE = 1,
@@ -191,7 +190,6 @@ typedef sdio_slave_ll_desc_t sdio_slave_hal_recv_desc_t;
#define sdio_slave_hal_recv_desc_s sdio_slave_ll_desc_s
typedef STAILQ_HEAD(recv_stailq_head_s, sdio_slave_hal_recv_desc_s) sdio_slave_hal_recv_stailq_t;
/** HAL context structure. Call `sdio_slave_hal_init` to initialize it and
* configure required members before actually use the HAL.
*/
@@ -370,7 +368,6 @@ esp_err_t sdio_slave_hal_send_flush_next_buffer(sdio_slave_context_t *hal, void
*/
esp_err_t sdio_slave_hal_send_reset_counter(sdio_slave_context_t *hal);
/*---------------------------------------------------------------------------
* Receive
*--------------------------------------------------------------------------*/
@@ -468,7 +465,6 @@ void sdio_slave_hal_recv_reset_counter(sdio_slave_context_t *hal);
*/
void sdio_slave_hal_recv_flush_one_buffer(sdio_slave_context_t *hal);
/*---------------------------------------------------------------------------
* Host
*--------------------------------------------------------------------------*/
@@ -506,7 +502,6 @@ void sdio_slave_hal_hostint_send(sdio_slave_context_t *hal, const sdio_slave_hos
*/
void sdio_slave_hal_hostint_clear(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask);
/**
* Fetch the interrupt (host send to slave) status bits and clear all of them.
* @param hal Context of the HAL layer.
components/soc/include/soc/sdio_slave_periph.h → components/esp_hal_sd/include/hal/sdio_slave_periph.h
+1 -1
View File
@@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
components/hal/include/hal/sdio_slave_types.h → components/esp_hal_sd/include/hal/sdio_slave_types.h
-1
View File
@@ -25,7 +25,6 @@ typedef enum {
SDIO_SLAVE_HOSTINT_SEND_NEW_PACKET = BIT(23), ///< New packet available
} sdio_slave_hostint_t;
/// Timing of SDIO slave
typedef enum {
SDIO_SLAVE_TIMING_PSEND_PSAMPLE = 0,/**< Send at posedge, and sample at posedge. Default value for HS mode.
components/hal/include/hal/sdmmc_hal.h → components/esp_hal_sd/include/hal/sdmmc_hal.h
-1
View File
@@ -34,7 +34,6 @@ typedef struct {
*/
void sdmmc_hal_init(sdmmc_hal_context_t *hal);
#ifdef __cplusplus
}
#endif
components/soc/include/soc/sdmmc_periph.h → components/esp_hal_sd/include/hal/sdmmc_periph.h
+15 -16
View File
@@ -1,14 +1,13 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
//include soc related (generated) definitions
#include "soc/soc_caps.h"
#include "soc/gpio_num.h"
#if SOC_SDMMC_HOST_SUPPORTED
#include "soc/sdmmc_reg.h"
#include "soc/sdmmc_struct.h"
@@ -41,20 +40,20 @@ extern const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS];
*/
typedef union {
struct {
gpio_num_t cd;
gpio_num_t wp;
gpio_num_t clk;
gpio_num_t cmd;
gpio_num_t d0;
gpio_num_t d1;
gpio_num_t d2;
gpio_num_t d3;
gpio_num_t d4;
gpio_num_t d5;
gpio_num_t d6;
gpio_num_t d7;
int cd;
int wp;
int clk;
int cmd;
int d0;
int d1;
int d2;
int d3;
int d4;
int d5;
int d6;
int d7;
};
gpio_num_t val[12]; // for iteration, num of entries in struct
int val[12]; // for iteration, num of entries in struct
} sdmmc_slot_io_info_t;
/** GPIO pin numbers of SD bus signals, one structure per slot */
components/hal/sdio_slave_hal.c → components/esp_hal_sd/sdio_slave_hal.c
+36 -27
View File
@@ -17,7 +17,6 @@
#include "hal/log.h"
#include "esp_attr.h"
#define SDIO_SLAVE_CHECK(res, str, ret_val) do { if(!(res)){\
HAL_LOGE(TAG, "%s", str);\
return ret_val;\
@@ -60,20 +59,20 @@ static inline uint8_t* sdio_ringbuf_offset_ptr(sdio_ringbuf_t *buf, sdio_ringbuf
{
uint8_t *buf_ptr;
switch (ptr) {
case RINGBUF_WRITE_PTR:
buf_ptr = buf->write_ptr;
break;
case RINGBUF_READ_PTR:
buf_ptr = buf->read_ptr;
break;
case RINGBUF_FREE_PTR:
buf_ptr = buf->free_ptr;
break;
default:
abort();
case RINGBUF_WRITE_PTR:
buf_ptr = buf->write_ptr;
break;
case RINGBUF_READ_PTR:
buf_ptr = buf->read_ptr;
break;
case RINGBUF_FREE_PTR:
buf_ptr = buf->free_ptr;
break;
default:
abort();
}
uint8_t *offset_ptr=buf_ptr+offset;
uint8_t *offset_ptr = buf_ptr + offset;
if (offset_ptr >= buf->data + buf->size) {
offset_ptr -= buf->size;
}
@@ -87,7 +86,9 @@ static esp_err_t sdio_ringbuf_send(sdio_ringbuf_t *buf, esp_err_t (*copy_callbac
if (copy_callback) {
err = (*copy_callback)(get_ptr, arg);
}
if (err != ESP_OK) return err;
if (err != ESP_OK) {
return err;
}
buf->write_ptr = get_ptr;
return ESP_OK;
@@ -98,8 +99,12 @@ static esp_err_t sdio_ringbuf_send(sdio_ringbuf_t *buf, esp_err_t (*copy_callbac
static inline esp_err_t sdio_ringbuf_recv(sdio_ringbuf_t *buf, sdio_slave_hal_send_desc_t **start, sdio_slave_hal_send_desc_t **end, ringbuf_get_all_t get_all)
{
HAL_ASSERT(buf->free_ptr == buf->read_ptr); //must return before recv again
if (start == NULL && end == NULL) return ESP_ERR_INVALID_ARG; // must have a output
if (buf->read_ptr == buf->write_ptr) return ESP_ERR_NOT_FOUND; // no data
if (start == NULL && end == NULL) {
return ESP_ERR_INVALID_ARG; // must have a output
}
if (buf->read_ptr == buf->write_ptr) {
return ESP_ERR_NOT_FOUND; // no data
}
uint8_t *get_start = sdio_ringbuf_offset_ptr(buf, RINGBUF_READ_PTR, SDIO_SLAVE_SEND_DESC_SIZE);
@@ -123,7 +128,7 @@ static inline int sdio_ringbuf_return(sdio_ringbuf_t* buf, uint8_t *ptr)
HAL_ASSERT(sdio_ringbuf_offset_ptr(buf, RINGBUF_FREE_PTR, SDIO_SLAVE_SEND_DESC_SIZE) == ptr);
size_t size = (buf->read_ptr + buf->size - buf->free_ptr) % buf->size;
size_t count = size / SDIO_SLAVE_SEND_DESC_SIZE;
HAL_ASSERT(count * SDIO_SLAVE_SEND_DESC_SIZE==size);
HAL_ASSERT(count * SDIO_SLAVE_SEND_DESC_SIZE == size);
buf->free_ptr = buf->read_ptr;
return count;
}
@@ -184,7 +189,9 @@ static esp_err_t init_send_queue(sdio_slave_context_t *hal)
//no copy for the first descriptor
ret = sdio_ringbuf_send(buf, NULL, NULL);
if (ret != ESP_OK) return ret;
if (ret != ESP_OK) {
return ret;
}
//loop in the ringbuf to link all the desc one after another as a ring
for (int i = 0; i < hal->send_queue_size + 1; i++) {
@@ -192,7 +199,9 @@ static esp_err_t init_send_queue(sdio_slave_context_t *hal)
HAL_ASSERT(rcv_res == ESP_OK);
ret = sdio_ringbuf_send(buf, link_desc_to_last, last);
if (ret != ESP_OK) return ret;
if (ret != ESP_OK) {
return ret;
}
sdio_ringbuf_return(buf, (uint8_t *) last);
}
@@ -212,7 +221,6 @@ void sdio_slave_hal_set_ioready(sdio_slave_context_t *hal, bool ready)
sdio_slave_ll_set_ioready(hal->hinf, ready); //set IO ready to 1 to allow host to use
}
/*---------------------------------------------------------------------------
* Send
*
@@ -268,7 +276,7 @@ static void send_isr_invoker_enable(const sdio_slave_context_t *hal)
sdio_slave_ll_send_reset(hal->slc);
sdio_slave_ll_send_start(hal->slc, &start_desc);
//wait for rx_done
while(!sdio_slave_ll_send_invoker_ready(hal->slc));
while (!sdio_slave_ll_send_invoker_ready(hal->slc));
sdio_slave_ll_send_stop(hal->slc);
sdio_slave_ll_send_hostint_clr(hal->host);
}
@@ -371,7 +379,7 @@ esp_err_t sdio_slave_hal_send_reset_counter(sdio_slave_context_t* hal)
hal->tail_pkt_len = 0;
sdio_slave_hal_send_desc_t *desc = hal->in_flight_head;
while(desc != NULL) {
while (desc != NULL) {
hal->tail_pkt_len += desc->dma_desc.length;
desc->pkt_len = hal->tail_pkt_len;
desc = SEND_DESC_NEXT(desc);
@@ -379,7 +387,7 @@ esp_err_t sdio_slave_hal_send_reset_counter(sdio_slave_context_t* hal)
// in theory the desc should be the one right next to the last of in_flight_head,
// but the link of last is NULL, so get the desc from the ringbuf directly.
desc = (sdio_slave_hal_send_desc_t*)sdio_ringbuf_peek_front(&(hal->send_desc_queue));
while(desc != NULL) {
while (desc != NULL) {
hal->tail_pkt_len += desc->dma_desc.length;
desc->pkt_len = hal->tail_pkt_len;
desc = SEND_DESC_NEXT(desc);
@@ -460,7 +468,6 @@ esp_err_t sdio_slave_hal_send_get_next_finished_arg(sdio_slave_context_t *hal, v
return ret;
}
esp_err_t sdio_slave_hal_send_flush_next_buffer(sdio_slave_context_t *hal, void **out_arg, uint32_t *out_return_cnt)
{
esp_err_t ret = ESP_OK;
@@ -532,7 +539,7 @@ esp_err_t sdio_slave_hal_send_queue(sdio_slave_context_t* hal, uint8_t *addr, si
.buf = addr,
.owner = 1,
// in stream mode, the eof is only appended (in ISR) when new packet is ready to be sent
.eof = (hal->sending_mode == SDIO_SLAVE_SEND_PACKET),
.eof = (hal->sending_mode == SDIO_SLAVE_SEND_PACKET),
},
.arg = arg,
.pkt_len = hal->tail_pkt_len,
@@ -551,7 +558,7 @@ static sdio_slave_ll_desc_t* recv_get_first_empty_buf(sdio_slave_context_t* hal)
{
sdio_slave_hal_recv_stailq_t *const queue = &(hal->recv_link_list);
sdio_slave_ll_desc_t *desc = STAILQ_FIRST(queue);
while(desc && desc->owner == 0) {
while (desc && desc->owner == 0) {
desc = STAILQ_NEXT(desc, qe);
}
return desc;
@@ -569,7 +576,9 @@ void sdio_slave_hal_recv_stop(sdio_slave_context_t* hal)
bool sdio_slave_hal_recv_has_next_item(sdio_slave_context_t* hal)
{
if (hal->recv_cur_ret == NULL || hal->recv_cur_ret->owner != 0) return false;
if (hal->recv_cur_ret == NULL || hal->recv_cur_ret->owner != 0) {
return false;
}
// This may cause the ``cur_ret`` pointer to be NULL, indicating the list is empty,
// in this case the ``tx_done`` should happen no longer until new desc is appended.
components/hal/sdmmc_hal.c → components/esp_hal_sd/sdmmc_hal.c
-1
View File
@@ -9,7 +9,6 @@
#include "hal/sdmmc_ll.h"
#include "soc/soc_caps.h"
void sdmmc_hal_init(sdmmc_hal_context_t *hal)
{
hal->dev = SDMMC_LL_GET_HW(0);
components/hal/CMakeLists.txt
-8
View File
@@ -40,10 +40,6 @@ if(NOT esp_tee_build AND NOT BOOTLOADER_BUILD)
list(APPEND srcs "systimer_hal.c")
endif()
if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
list(APPEND srcs "sdmmc_hal.c")
endif()
if(CONFIG_SOC_ETM_SUPPORTED)
list(APPEND srcs "etm_hal.c" "${target}/etm_periph.c")
endif()
@@ -51,10 +47,6 @@ if(NOT esp_tee_build AND NOT BOOTLOADER_BUILD)
if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
list(APPEND srcs "${target}/modem_clock_hal.c")
endif()
if(CONFIG_SOC_SDIO_SLAVE_SUPPORTED)
list(APPEND srcs "sdio_slave_hal.c")
endif()
endif()
idf_component_register(SRCS ${srcs}
components/sdmmc/CMakeLists.txt
+2 -2
View File
@@ -22,5 +22,5 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS include
REQUIRES esp_blockdev
PRIV_REQUIRES soc esp_timer esp_mm)
REQUIRES esp_blockdev esp_hal_sd
PRIV_REQUIRES esp_timer esp_mm)
components/soc/CMakeLists.txt
-9
View File
@@ -70,15 +70,6 @@ if(CONFIG_SOC_MPI_SUPPORTED)
list(APPEND srcs "${target_folder}/mpi_periph.c")
endif()
if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
list(APPEND srcs "${target_folder}/sdmmc_periph.c")
endif()
if(CONFIG_SOC_SDIO_SLAVE_SUPPORTED)
list(APPEND srcs "${target_folder}/sdio_slave_periph.c")
endif()
if(CONFIG_SOC_PAU_SUPPORTED AND CONFIG_SOC_LIGHT_SLEEP_SUPPORTED AND CONFIG_SOC_PM_SUPPORT_TOP_PD)
list(APPEND srcs "${target_folder}/system_retention_periph.c")
endif()
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
-4
View File
@@ -1155,10 +1155,6 @@ config SOC_SDMMC_DATA_WIDTH_MAX
int
default 8
config SOC_SDMMC_SUPPORT_XTAL_CLOCK
bool
default y
config SOC_SDMMC_DELAY_PHASE_NUM
int
default 4
components/soc/esp32s3/include/soc/sdmmc_pins.h
-19
View File
@@ -1,19 +0,0 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
/* SDMMC pins on ESP32-S3 are configurable through GPIO matrix.
* This file is kept for compatibility only.
*/
components/soc/esp32s3/include/soc/soc_caps.h
-2
View File
@@ -481,8 +481,6 @@
#define SOC_SDMMC_USE_GPIO_MATRIX 1
#define SOC_SDMMC_NUM_SLOTS 2
#define SOC_SDMMC_DATA_WIDTH_MAX 8
/* Indicates that there is an option to use XTAL clock instead of PLL for SDMMC */
#define SOC_SDMMC_SUPPORT_XTAL_CLOCK 1
/* Supported host clock delay phase number */
#define SOC_SDMMC_DELAY_PHASE_NUM 4
docs/doxygen/Doxyfile
+3 -3
View File
@@ -172,6 +172,7 @@ INPUT = \
$(PROJECT_PATH)/components/esp_hal_ana_conv/include/hal/dac_types.h \
$(PROJECT_PATH)/components/esp_hal_ana_conv/include/hal/temperature_sensor_types.h \
$(PROJECT_PATH)/components/esp_hal_emac/include/hal/eth_types.h \
$(PROJECT_PATH)/components/esp_hal_gpio/$(IDF_TARGET)/include/soc/gpio_num.h \
$(PROJECT_PATH)/components/esp_hal_gpio/include/hal/gpio_types.h \
$(PROJECT_PATH)/components/esp_hal_gpio/include/hal/rtc_io_types.h \
$(PROJECT_PATH)/components/esp_hal_gpio/include/hal/sdm_types.h \
@@ -189,6 +190,8 @@ INPUT = \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/spi_flash_types.h \
$(PROJECT_PATH)/components/esp_hal_pcnt/include/hal/pcnt_types.h \
$(PROJECT_PATH)/components/esp_hal_rmt/include/hal/rmt_types.h \
$(PROJECT_PATH)/components/esp_hal_sd/include/hal/sdio_slave_types.h \
$(PROJECT_PATH)/components/esp_hal_sd/include/hal/sd_types.h \
$(PROJECT_PATH)/components/esp_hal_twai/include/hal/twai_types.h \
$(PROJECT_PATH)/components/esp_hal_uart/include/hal/uart_types.h \
$(PROJECT_PATH)/components/esp_hal_uart/include/hal/uhci_types.h \
@@ -275,10 +278,8 @@ INPUT = \
$(PROJECT_PATH)/components/freertos/FreeRTOS-Kernel/include/freertos/task.h \
$(PROJECT_PATH)/components/freertos/FreeRTOS-Kernel/include/freertos/timers.h \
$(PROJECT_PATH)/components/hal/include/hal/color_types.h \
$(PROJECT_PATH)/components/hal/include/hal/sdio_slave_types.h \
$(PROJECT_PATH)/components/hal/include/hal/efuse_hal.h \
$(PROJECT_PATH)/components/hal/include/hal/lp_core_types.h \
$(PROJECT_PATH)/components/hal/include/hal/sd_types.h \
$(PROJECT_PATH)/components/heap/include/esp_heap_caps_init.h \
$(PROJECT_PATH)/components/heap/include/esp_heap_caps.h \
$(PROJECT_PATH)/components/heap/include/esp_heap_task_info.h \
@@ -323,7 +324,6 @@ INPUT = \
$(PROJECT_PATH)/components/soc/include/soc/soc_caps_eval.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/adc_channel.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/clk_tree_defs.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/gpio_num.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/soc_caps.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/uart_pins.h \
$(PROJECT_PATH)/components/spi_flash/include/esp_flash_spi_init.h \
tools/ci/check_copyright_ignore.txt
-1
View File
@@ -480,7 +480,6 @@ components/soc/esp32/include/soc/fe_reg.h
components/soc/esp32/include/soc/flash_encryption_reg.h
components/soc/esp32/include/soc/gpio_sig_map.h
components/soc/esp32/include/soc/reset_reasons.h
components/soc/esp32/include/soc/sdmmc_pins.h
components/soc/esp32/include/soc/soc_ulp.h
components/soc/esp32s2/include/soc/fe_reg.h
components/soc/esp32s2/include/soc/memprot_defs.h