feat(phy): add check for required clock bits during phy enable

components/esp_hw_support/include/esp_private/esp_modem_clock.h

@@ -62,6 +62,18 @@ void modem_clock_module_enable(shared_periph_module_t module);
  */
 void modem_clock_module_disable(shared_periph_module_t module);
 
+/**
+ * @brief Gets the clock bitmask associated with the specified modem module.
+ *
+ * This function returns the complete set of clock-enable bits that correspond
+ * to @p module.
+ *
+ * @param module  Target shared peripheral clock module.
+ *
+ * @return Bitmask of clock-enable bits for the given module.
+ */
+uint32_t modem_clock_module_bits_get(shared_periph_module_t module);
+
 /**
  * @brief Reset the mac of modem module
  *

components/esp_hw_support/include/esp_private/periph_ctrl.h

@@ -167,6 +167,13 @@ void phy_module_enable(void);
  */
 void phy_module_disable(void);
 
+/**
+ * @brief Checks whether phy module has all bits in @p mask set.
+ *
+ * @return true if all bits in @p mask are set; false otherwise.
+ */
+bool phy_module_has_clock_bits(uint32_t mask);
+
 #undef __PERIPH_CTRL_DEPRECATE_ATTR
 
 #ifdef __cplusplus

components/esp_hw_support/modem_clock.c

@@ -407,6 +407,29 @@ void IRAM_ATTR modem_clock_module_disable(shared_periph_module_t module)
     modem_clock_device_disable(MODEM_CLOCK_instance(), deps);
 }
 
+uint32_t IRAM_ATTR modem_clock_module_bits_get(shared_periph_module_t module)
+{
+    assert(IS_MODEM_MODULE(module));
+    uint32_t val = 0;
+    switch (module)
+    {
+#if SOC_WIFI_SUPPORTED
+        case PERIPH_WIFI_MODULE:
+#endif
+#if SOC_BT_SUPPORTED
+        case PERIPH_BT_MODULE:
+#endif
+#if SOC_IEEE802154_SUPPORTED
+        case PERIPH_IEEE802154_MODULE:
+#endif
+        case PERIPH_PHY_MODULE:
+            val = modem_syscon_ll_clk_conf1_get(MODEM_CLOCK_instance()->hal->syscon_dev);
+        default:
+            break;
+    }
+    return val;
+}
+
 void modem_clock_deselect_all_module_lp_clock_source(void)
 {
 #if SOC_WIFI_SUPPORTED

components/esp_hw_support/periph_ctrl.c

@@ -11,6 +11,7 @@
 #ifdef __PERIPH_CTRL_ALLOW_LEGACY_API
 #include "hal/clk_gate_ll.h"
 #endif
+#include "esp_log.h"
 
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED
 #include "esp_private/esp_modem_clock.h"
@@ -211,4 +212,23 @@ IRAM_ATTR void phy_module_disable(void)
     esp_os_exit_critical_safe(&periph_spinlock);
 #endif
 }
+
+IRAM_ATTR bool phy_module_has_clock_bits(uint32_t mask)
+{
+    uint32_t val = 0;
+#if SOC_MODEM_CLOCK_IS_INDEPENDENT
+    val = modem_clock_module_bits_get(PERIPH_PHY_MODULE);
+#else
+#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
+    val = DPORT_REG_READ(periph_ll_get_clk_en_reg(PERIPH_WIFI_BT_COMMON_MODULE));
+#else
+    return true;
+#endif
+#endif
+    if ((val & mask) != mask) {
+        ESP_LOGW("periph_ctrl", "phy module clock bits 0x%x, required 0x%x", val, mask);
+        return false;
+    }
+    return true;
+}
 #endif  //#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED || SOC_IEEE802154_SUPPORTED

components/esp_phy/esp32/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x8FCF

components/esp_phy/esp32c2/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0xE0788FCF

components/esp_phy/esp32c3/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x788FCF

components/esp_phy/esp32c5/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x3BE7FF

components/esp_phy/esp32c6/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x7E7FF

components/esp_phy/esp32c61/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x3BE7FF

components/esp_phy/esp32h2/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x7f000

components/esp_phy/esp32h21/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x0 //TODO

components/esp_phy/esp32h4/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x0 //TODO

components/esp_phy/esp32s2/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x7887CF

components/esp_phy/esp32s3/include/phy_init_deps.h

@@ -0,0 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS  0x788FCF

components/esp_phy/src/phy_init.c

@@ -53,6 +53,12 @@
 #include "esp_private/esp_modem_clock.h"
 #include "soc/periph_defs.h"
 #endif
+#include "phy_init_deps.h"
+
+#ifndef PHY_INIT_MODEM_CLOCK_REQUIRED_BITS
+#warning "PHY_INIT_MODEM_CLOCK_REQUIRED_BITS not defined; using default value 0"
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS 0
+#endif
 
 #if CONFIG_IDF_TARGET_ESP32
 extern wifi_mac_time_update_cb_t s_wifi_mac_time_update_cb;
@@ -301,6 +307,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
 #endif
         esp_phy_common_clock_enable();
         phy_module_enable();
+        assert(phy_module_has_clock_bits(PHY_INIT_MODEM_CLOCK_REQUIRED_BITS));
         if (s_is_phy_calibrated == false) {
             esp_phy_load_cal_and_init();
             s_is_phy_calibrated = true;

components/esp_phy/src/phy_init_esp32hxx.c

@@ -14,6 +14,12 @@
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
 #include "esp_private/esp_modem_clock.h"
 #endif
+#include "phy_init_deps.h"
+
+#ifndef PHY_INIT_MODEM_CLOCK_REQUIRED_BITS
+#warning "PHY_INIT_MODEM_CLOCK_REQUIRED_BITS not defined; using default value 0"
+#define PHY_INIT_MODEM_CLOCK_REQUIRED_BITS 0
+#endif
 
 #define PHY_ENABLE_VERSION_PRINT 1
 
@@ -108,6 +114,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
         modem_clock_module_enable(PERIPH_PHY_MODULE);
 #endif
         phy_module_enable();
+        assert(phy_module_has_clock_bits(PHY_INIT_MODEM_CLOCK_REQUIRED_BITS));
         if (!s_phy_is_enabled) {
             register_chipv7_phy(NULL, NULL, PHY_RF_CAL_FULL);
             phy_version_print();

components/hal/esp32c5/include/hal/modem_syscon_ll.h

@@ -324,6 +324,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
     }
 }
 
+__attribute__((always_inline))
+static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
+{
+    return hw->clk_conf1.val;
+}
+
 __attribute__((always_inline))
 static inline void modem_syscon_ll_clk_wifibb_configure(modem_syscon_dev_t *hw, bool en)
 {

components/hal/esp32c6/include/hal/modem_syscon_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -293,6 +293,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
     }
 }
 
+__attribute__((always_inline))
+static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
+{
+    return hw->clk_conf1.val;
+}
+
 __attribute__((always_inline))
 static inline void modem_syscon_ll_clk_wifibb_configure(modem_syscon_dev_t *hw, bool en)
 {

components/hal/esp32c61/include/hal/modem_syscon_ll.h

@@ -324,6 +324,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
     }
 }
 
+__attribute__((always_inline))
+static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
+{
+    return hw->clk_conf1.val;
+}
+
 __attribute__((always_inline))
 static inline void modem_syscon_ll_clk_wifibb_configure(modem_syscon_dev_t *hw, bool en)
 {

components/hal/esp32h2/include/hal/modem_syscon_ll.h

@@ -197,6 +197,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
     }
 }
 
+__attribute__((always_inline))
+static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
+{
+    return hw->clk_conf1.val;
+}
+
 __attribute__((always_inline))
 static inline void modem_syscon_ll_enable_fe_16m_clock(modem_syscon_dev_t *hw, bool en)
 {

components/hal/esp32h21/include/hal/modem_syscon_ll.h

@@ -198,6 +198,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
     }
 }
 
+__attribute__((always_inline))
+static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
+{
+    return hw->clk_conf1.val;
+}
+
 __attribute__((always_inline))
 static inline void modem_syscon_ll_enable_fe_txlogain_clock(modem_syscon_dev_t *hw, bool en)
 {

components/hal/esp32h4/include/hal/modem_syscon_ll.h

@@ -298,6 +298,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
     }
 }
 
+__attribute__((always_inline))
+static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
+{
+    return hw->clk_conf1.val;
+}
+
 __attribute__((always_inline))
 static inline void modem_syscon_ll_enable_fe_txlogain_clock(modem_syscon_dev_t *hw, bool en)
 {