Merge branch 'feat/p4_eco5_rng' into 'master'

feat(rng): support P4 ECO5 TRNG

Closes IDF-13521

See merge request espressif/esp-idf!42196

components/bootloader_support/src/bootloader_random_esp32p4.c

@@ -8,11 +8,16 @@
 #include "hal/regi2c_ctrl_ll.h"
 #include "hal/adc_ll.h"
 #include "hal/adc_types.h"
+#include "hal/config.h"
 
 #include "esp_private/periph_ctrl.h"
 #include "esp_private/adc_share_hw_ctrl.h"
 #include "esp_private/sar_periph_ctrl.h"
 
+#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
+#include "hal/trng_ll.h"
+#endif
+
 #define I2C_SAR_ADC_INIT_CODE_VAL       2166
 #define ADC_RNG_CLKM_DIV_NUM            0
 #define ADC_RNG_CLKM_DIV_B              0
@@ -60,6 +65,9 @@ void bootloader_random_enable(void)
     adc_ll_digi_set_clk_div(15);
     adc_ll_digi_set_trigger_interval(100);
     adc_ll_digi_trigger_enable();
+#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
+    trng_ll_enable();
+#endif
 }
 
 void bootloader_random_disable(void)
@@ -80,4 +88,8 @@ void bootloader_random_disable(void)
     adc_ll_digi_clk_sel(ADC_DIGI_CLK_SRC_XTAL);
 
     adc_ll_set_controller(ADC_UNIT_1, ADC_LL_CTRL_ULP);
+
+#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
+    trng_ll_disable();
+#endif
 }

components/hal/esp32p4/include/hal/trng_ll.h

@@ -0,0 +1,116 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "soc/soc.h"
+#include "soc/trng_struct.h"
+#include "hal/config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable or disable TRNG clock
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void trng_ll_enable_clock(bool enable)
+{
+    LP_TRNG.date.clk_en = enable;
+}
+
+/**
+ * @brief Reset TRNG module
+ */
+static inline void trng_ll_reset(void)
+{
+    LP_TRNG.rstn.rstn = 0;
+    LP_TRNG.rstn.rstn = 1;
+}
+
+/**
+ * @brief Enable or disable TRNG sampling
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void trng_ll_enable_sample(bool enable)
+{
+    LP_TRNG.cfg.sample_enable = enable;
+}
+
+/**
+ * @brief Set TRNG timer prescaler
+ *
+ * @param prescaler Timer prescaler value (0-255)
+ */
+static inline void trng_ll_set_timer_prescaler(uint8_t prescaler)
+{
+    LP_TRNG.cfg.timer_pscale = prescaler;
+}
+
+/**
+ * @brief Enable or disable TRNG timer XOR
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void trng_ll_enable_timer(bool enable)
+{
+    LP_TRNG.cfg.timer_en = enable;
+}
+
+/**
+ * @brief Get TRNG sample count
+ *
+ * @return Current sample count (0-255)
+ */
+static inline uint8_t trng_ll_get_sample_count(void)
+{
+    return (uint8_t)LP_TRNG.cfg.sample_cnt;
+}
+
+/**
+ * @brief Read random data from TRNG
+ *
+ * @return 32-bit random data
+ */
+static inline uint32_t trng_ll_read_data(void)
+{
+    return LP_TRNG.data.data;
+}
+
+/**
+ * @brief Enable TRNG module
+ *
+ * TODO: unify in trng_hal.c
+ */
+static inline void trng_ll_enable(void)
+{
+    trng_ll_enable_clock(true);
+    trng_ll_reset();
+    trng_ll_enable_timer(true);
+    trng_ll_enable_sample(true);
+}
+
+/**
+ * @brief Disable TRNG module
+ *
+ * TODO: unify in trng_hal.c
+ */
+static inline void trng_ll_disable(void)
+{
+    trng_ll_enable_sample(false);
+    trng_ll_enable_timer(false);
+    trng_ll_enable_clock(false);
+}
+
+
+#ifdef __cplusplus
+}
+#endif

components/soc/esp32p4/include/soc/wdev_reg.h

@@ -1,13 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "soc.h"
-#include "soc/lpperi_reg.h"
-
-/* Hardware random number generator register */
-#define WDEV_RND_REG    0x501101a4

components/soc/esp32p4/ld/esp32p4.peripherals.ld

@@ -83,6 +83,7 @@ PROVIDE ( LP_I2C        = 0x50122000 );
 PROVIDE ( LP_SPI        = 0x50123000 );
 PROVIDE ( LP_WDT        = 0x50116000 );
 PROVIDE ( LP_I2S        = 0x50125000 );
+PROVIDE ( LP_TRNG       = 0x50126000 );
 PROVIDE ( LP_ADC        = 0x50127000 );
 PROVIDE ( LP_TOUCH      = 0x50128000 );
 PROVIDE ( LP_GPIO         = 0x5012A000 );

components/soc/esp32p4/register/hw_ver1/soc/wdev_reg.h

@@ -0,0 +1,20 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/lp_system_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Hardware random number generator register */
+#define WDEV_RND_REG    LP_SYSTEM_REG_RNG_DATA_REG
+
+#ifdef __cplusplus
+}
+#endif

components/soc/esp32p4/register/hw_ver3/soc/reg_base.h

@@ -151,6 +151,7 @@
 #define DR_REG_LP_SPI_BASE            (DR_REG_LPPERIPH_BASE + 0x3000)
 #define DR_REG_I2C_ANA_MST_BASE       (DR_REG_LPPERIPH_BASE + 0x4000)
 #define DR_REG_LP_I2S_BASE            (DR_REG_LPPERIPH_BASE + 0x5000)
+#define DR_REG_LP_TRNG_BASE           (DR_REG_LPPERIPH_BASE + 0x6000)
 #define DR_REG_LP_ADC_BASE            (DR_REG_LPPERIPH_BASE + 0x7000)
 #define DR_REG_LP_TOUCH_BASE          (DR_REG_LPPERIPH_BASE + 0x8000)
 #define DR_REG_LP_GPIO_BASE           (DR_REG_LPPERIPH_BASE + 0xA000)

components/soc/esp32p4/register/hw_ver3/soc/trng_reg.h

@@ -14,7 +14,7 @@ extern "C" {
 /** RNG_CFG_REG register
  *  configure rng register
  */
-#define RNG_CFG_REG (DR_REG_RNG_BASE + 0x0)
+#define RNG_CFG_REG (DR_REG_LP_TRNG_BASE + 0x0)
 /** RNG_SAMPLE_ENABLE : R/W; bitpos: [0]; default: 0;
  *  enable rng RO
  *  1: enable RO
@@ -49,7 +49,7 @@ extern "C" {
 /** RNG_DATA_REG register
  *  RNG result register
  */
-#define RNG_DATA_REG (DR_REG_RNG_BASE + 0x4)
+#define RNG_DATA_REG (DR_REG_LP_TRNG_BASE + 0x4)
 /** RNG_DATA : RO; bitpos: [31:0]; default: 0;
  *  get rng data
  */
@@ -61,7 +61,7 @@ extern "C" {
 /** RNG_RSTN_REG register
  *  rng rstn register
  */
-#define RNG_RSTN_REG (DR_REG_RNG_BASE + 0x8)
+#define RNG_RSTN_REG (DR_REG_LP_TRNG_BASE + 0x8)
 /** RNG_RSTN : R/W; bitpos: [0]; default: 1;
  *  enable rng system reset: 1: not reset, 0: reset
  */
@@ -73,7 +73,7 @@ extern "C" {
 /** RNG_DATE_REG register
  *  need_des
  */
-#define RNG_DATE_REG (DR_REG_RNG_BASE + 0xc)
+#define RNG_DATE_REG (DR_REG_LP_TRNG_BASE + 0xc)
 /** RNG_DATE : R/W; bitpos: [30:0]; default: 2425091;
  *  need_des
  */

components/soc/esp32p4/register/hw_ver3/soc/wdev_reg.h

@@ -0,0 +1,20 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "soc/trng_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Hardware random number generator register */
+#define WDEV_RND_REG    RNG_DATA_REG
+
+#ifdef __cplusplus
+}
+#endif