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fix(i2c): reset master before bus clear on chips without HW FSM reset
Reorder s_i2c_hw_fsm_reset() so i2c_ll_reset_register and interrupt masking run before s_i2c_master_clear_bus(). Avoids ISR firing when i2c_common_set_pins reconnects GPIOs to a stuck FSM (IDFGH-17497). Closes https://github.com/espressif/esp-idf/issues/18438 Made-with: Cursor
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@@ -119,10 +119,7 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master, bool cle
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i2c_hal_get_timing_config(hal, &timing_config);
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i2c_ll_master_get_filter(hal->dev, &filter_cfg);
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//to reset the I2C hw module, we need re-enable the hw
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if (clear_bus) {
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ret = s_i2c_master_clear_bus(i2c_master->base);
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}
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// Run bus clear after reset and interrupt masking; reconnecting pins must not wake a stuck FSM.
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PERIPH_RCC_ATOMIC() {
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i2c_ll_reset_register(i2c_master->base->port_num);
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}
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@@ -137,6 +134,10 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master, bool cle
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i2c_ll_clear_intr_mask(hal->dev, I2C_LL_INTR_MASK);
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i2c_hal_set_timing_config(hal, &timing_config);
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i2c_ll_master_set_filter(hal->dev, filter_cfg);
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if (clear_bus) {
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ret = s_i2c_master_clear_bus(i2c_master->base);
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}
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#else
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i2c_ll_master_fsm_rst(hal->dev);
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if (clear_bus) {
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