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Merge branch 'feat/gpio_glitch_filter_esp32s31' into 'master'

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feat(gpio): support glitch filter on esp32s31

Closes IDF-14781

See merge request espressif/esp-idf!47353
This commit is contained in:
morris
2026-04-09 10:57:37 +08:00
parent 511e824085 e69f2c8346
commit e8e56399d3
43 changed files with 103 additions and 58 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_driver_gpio/src/gpio_etm.c
+1 -1
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@@ -52,7 +52,7 @@ struct gpio_etm_task_t {
};
static gpio_etm_group_t s_gpio_etm_group = {
.dev = &GPIO_ETM,
.dev = GPIO_LL_ETM_GET_HW(),
.spinlock = portMUX_INITIALIZER_UNLOCKED,
};
components/esp_driver_gpio/src/gpio_flex_glitch_filter.c
+1 -1
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@@ -35,7 +35,7 @@ struct gpio_flex_glitch_filter_t {
};
static gpio_flex_glitch_filter_group_t s_gpio_glitch_filter_group = {
.hw = &GLITCH_FILTER,
.hw = GPIO_LL_GLITCH_FILTER_GET_HW(),
.spinlock = portMUX_INITIALIZER_UNLOCKED,
};
components/esp_hal_gpio/esp32c5/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32c5/include/hal/gpio_glitch_filter_ll.h
+1
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@@ -17,6 +17,7 @@
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.glitch_filter)
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW (GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V + 1)
#ifdef __cplusplus
components/esp_hal_gpio/esp32c5/include/hal/sdm_ll.h
+1 -1
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@@ -13,7 +13,7 @@
#include "soc/gpio_ext_reg.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/esp_hal_gpio/esp32c6/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32c6/include/hal/gpio_glitch_filter_ll.h
+1
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@@ -17,6 +17,7 @@
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.glitch_filter)
// the max window size is expected to be 64, but due to a hardware issue, we need to limit it to 63
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V
components/esp_hal_gpio/esp32c6/include/hal/sdm_ll.h
+1 -1
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@@ -13,7 +13,7 @@
#include "soc/gpio_ext_reg.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/esp_hal_gpio/esp32c61/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32h2/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32h2/include/hal/gpio_glitch_filter_ll.h
+1
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@@ -17,6 +17,7 @@
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.glitch_filter)
// the max window size is expected to be 64, but due to a hardware issue, we need to limit it to 63
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V
components/esp_hal_gpio/esp32h2/include/hal/sdm_ll.h
+1 -1
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@@ -13,7 +13,7 @@
#include "soc/gpio_ext_reg.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/esp_hal_gpio/esp32h21/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32h21/include/hal/gpio_glitch_filter_ll.h
+1
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@@ -11,6 +11,7 @@
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.glitch_filter)
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW (GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V + 1)
#ifdef __cplusplus
components/esp_hal_gpio/esp32h21/include/hal/sdm_ll.h
+1 -1
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@@ -13,7 +13,7 @@
#include "soc/gpio_ext_reg.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/esp_hal_gpio/esp32h4/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32h4/include/hal/gpio_glitch_filter_ll.h
+1
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@@ -11,6 +11,7 @@
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.ext_glitch_filter)
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW (GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V + 1)
#ifdef __cplusplus
components/esp_hal_gpio/esp32h4/include/hal/sdm_ll.h
+1 -1
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@@ -13,7 +13,7 @@
#include "soc/gpio_ext_reg.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/esp_hal_gpio/esp32p4/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32p4/include/hal/gpio_glitch_filter_ll.h
+1
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@@ -11,6 +11,7 @@
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.glitch_filter)
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW (GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V + 1)
#ifdef __cplusplus
components/esp_hal_gpio/esp32p4/include/hal/sdm_ll.h
+1 -1
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@@ -13,7 +13,7 @@
#include "soc/gpio_ext_reg.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/esp_hal_gpio/esp32s31/include/hal/gpio_etm_ll.h
+2
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@@ -22,6 +22,8 @@
#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
#define GPIO_LL_ETM_GET_HW() ((gpio_etm_dev_t *)(void *)&GPIO_EXT.etm)
#ifdef __cplusplus
extern "C" {
#endif
components/esp_hal_gpio/esp32s31/include/hal/gpio_glitch_filter_ll.h
+62
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@@ -0,0 +1,62 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>
#include "hal/assert.h"
#include "soc/gpio_ext_struct.h"
#include "soc/gpio_ext_reg.h"
#define GPIO_LL_GLITCH_FILTER_GET_HW() ((gpio_glitch_filter_dev_t *)(void *)&GPIO_EXT.glitch_filter)
#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW (GPIO_EXT_FILTER_CH0_WINDOW_WIDTH_V + 1)
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Enable GPIO glitch filter
*
* @param hw Glitch filter register base address
* @param filter_idx Glitch filter index
* @param enable True to enable, false to disable
*/
static inline void gpio_ll_glitch_filter_enable(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, bool enable)
{
hw->glitch_filter_chn[filter_idx].filter_chn_en = enable;
}
/**
* @brief Set the input GPIO for the glitch filter
*
* @param hw Glitch filter register base address
* @param filter_idx Glitch filter index
* @param gpio_num GPIO number
*/
static inline void gpio_ll_glitch_filter_set_gpio(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, uint32_t gpio_num)
{
hw->glitch_filter_chn[filter_idx].filter_chn_input_io_num = gpio_num;
}
/**
* @brief Set the coefficient of the glitch filter window
*
* @param hw Glitch filter register base address
* @param filter_idx Glitch filter index
* @param window_width Window width, in IOMUX clock ticks
* @param window_threshold Window threshold, in IOMUX clock ticks
*/
static inline void gpio_ll_glitch_filter_set_window_coeff(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, uint32_t window_width, uint32_t window_thres)
{
HAL_ASSERT(window_thres <= window_width);
hw->glitch_filter_chn[filter_idx].filter_chn_window_width = window_width - 1;
hw->glitch_filter_chn[filter_idx].filter_chn_window_thres = window_thres - 1;
}
#ifdef __cplusplus
}
#endif
components/esp_hal_gpio/esp32s31/include/hal/sdm_ll.h
+1 -1
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@@ -14,7 +14,7 @@
#include "soc/soc.h"
// Get SDM register base address with giving group number
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? (&SDM) : NULL)
#define SDM_LL_GET_HW(group_id) ((group_id == 0) ? ((gpio_sd_dev_t *)(void *)&GPIO_EXT.sigma_delta) : NULL)
#define SDM_LL_PRESCALE_MAX (GPIO_EXT_SD0_PRESCALE_V + 1)
components/soc/esp32c5/ld/esp32c5.peripherals.ld
-3
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@@ -46,9 +46,6 @@ PROVIDE ( ECDSA = 0x6008E000 );
PROVIDE ( IO_MUX = 0x60090000 );
PROVIDE ( GPIO = 0x60091000 );
PROVIDE ( GPIO_EXT = 0x60091e00 );
PROVIDE ( SDM = 0x60091e00 );
PROVIDE ( GLITCH_FILTER = 0x60091ed8 );
PROVIDE ( GPIO_ETM = 0x60091f18 );
PROVIDE ( MEM_MONITOR = 0x60092000 );
PROVIDE ( PAU = 0x60093000 );
PROVIDE ( HP_SYSTEM = 0x60095000 );
components/soc/esp32c5/register/soc/gpio_ext_struct.h
-3
View File
@@ -415,9 +415,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32c6/ld/esp32c6.peripherals.ld
-3
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@@ -47,9 +47,6 @@ PROVIDE ( HMAC = 0x6008D000 );
PROVIDE ( IO_MUX = 0x60090000 );
PROVIDE ( GPIO = 0x60091000 );
PROVIDE ( GPIO_EXT = 0x60091f00 );
PROVIDE ( SDM = 0x60091f00 );
PROVIDE ( GLITCH_FILTER = 0x60091f30 );
PROVIDE ( GPIO_ETM = 0x60091f60 );
PROVIDE ( MEM_MONITOR = 0x60092000 );
PROVIDE ( PAU = 0x60093000 );
components/soc/esp32c6/register/soc/gpio_ext_struct.h
-3
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@@ -200,9 +200,6 @@ typedef struct gpio_ext_dev_t {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32c61/ld/esp32c61.peripherals.ld
-1
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@@ -32,7 +32,6 @@ PROVIDE ( ECDSA = 0x6008E000 );
PROVIDE ( IO_MUX = 0x60090000 );
PROVIDE ( GPIO = 0x60091000 );
PROVIDE ( GPIO_EXT = 0x60091e00 );
PROVIDE ( GPIO_ETM = 0x60091f18 );
PROVIDE ( MEM_MONITOR = 0x60092000 );
PROVIDE ( PAU = 0x60093000 );
PROVIDE ( HP_SYSTEM = 0x60095000 );
components/soc/esp32c61/register/soc/gpio_ext_struct.h
-1
View File
@@ -551,7 +551,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32h2/ld/esp32h2.peripherals.ld
-3
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@@ -44,9 +44,6 @@ PROVIDE ( ECDSA = 0x6008E000 );
PROVIDE ( IO_MUX = 0x60090000 );
PROVIDE ( GPIO = 0x60091000 );
PROVIDE ( GPIO_EXT = 0x60091f00 );
PROVIDE ( SDM = 0x60091f00 );
PROVIDE ( GLITCH_FILTER = 0x60091f30 );
PROVIDE ( GPIO_ETM = 0x60091f60 );
PROVIDE ( MEM_ACS_MONITOR = 0x60092000 );
PROVIDE ( PAU = 0x60093000 );
components/soc/esp32h2/register/soc/gpio_ext_struct.h
-3
View File
@@ -305,9 +305,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32h21/ld/esp32h21.peripherals.ld
-3
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@@ -39,9 +39,6 @@ PROVIDE ( ECDSA = 0x6008E000 );
PROVIDE ( IO_MUX = 0x60090000 );
PROVIDE ( GPIO = 0x60091000 );
PROVIDE ( GPIO_EXT = 0x60091E00 );
PROVIDE ( SDM = 0x60091E04 );
PROVIDE ( GLITCH_FILTER = 0x60091ED8 );
PROVIDE ( GPIO_ETM = 0x60091F18 );
PROVIDE ( MEM_MONITOR = 0x60092000 );
PROVIDE ( PAU = 0x60093000 );
PROVIDE ( HP_SYSTEM = 0x60095000 );
components/soc/esp32h21/register/soc/gpio_ext_struct.h
-3
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@@ -591,9 +591,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32h4/ld/esp32h4.peripherals.ld
-3
View File
@@ -45,9 +45,6 @@ PROVIDE ( TIMERG1 = 0x60091000 );
PROVIDE ( IO_MUX = 0x60092000 );
PROVIDE ( GPIO = 0x60093000 );
PROVIDE ( GPIO_EXT = 0x60093E00 );
PROVIDE ( SDM = 0x60093E00 );
PROVIDE ( GLITCH_FILTER = 0x60093ED8 );
PROVIDE ( GPIO_ETM = 0x60093F18 );
PROVIDE ( PCR = 0x60094000 );
PROVIDE ( SPIMEM0 = 0x60098000 );
PROVIDE ( SPIMEM1 = 0x60099000 );
components/soc/esp32h4/register/soc/gpio_ext_struct.h
-3
View File
@@ -270,9 +270,6 @@ typedef struct {
volatile gpio_ext_version_reg_t ext_version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32p4/ld/esp32p4.peripherals.ld
-3
View File
@@ -62,9 +62,6 @@ PROVIDE ( ECDSA = 0x50096000 );
PROVIDE ( GPIO = 0x500E0000 );
PROVIDE ( GPIO_EXT = 0x500E0F00 );
PROVIDE ( SDM = 0x500E0F00 );
PROVIDE ( GLITCH_FILTER = 0x500E0F30 );
PROVIDE ( GPIO_ETM = 0x500E0F60 );
PROVIDE ( IO_MUX = 0x500E1000 );
PROVIDE ( MSPI_IOMUX = 0x500E1200 );
components/soc/esp32p4/register/hw_ver1/soc/gpio_ext_struct.h
-3
View File
@@ -180,9 +180,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32p4/register/hw_ver3/soc/gpio_ext_struct.h
-3
View File
@@ -180,9 +180,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus
components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+8
View File
@@ -275,6 +275,14 @@ config SOC_GPIO_PIN_COUNT
int
default 62
config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
bool
default y
config SOC_GPIO_FLEX_GLITCH_FILTER_NUM
int
default 8
config SOC_GPIO_SUPPORT_PIN_HYS_FILTER
bool
default y
components/soc/esp32s31/include/soc/soc_caps.h
+2 -2
View File
@@ -163,8 +163,8 @@
// ESP32-S31 has 1 GPIO peripheral
#define SOC_GPIO_PORT 1U
#define SOC_GPIO_PIN_COUNT 62
// #define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 // TODO: [ESP32S31] IDF-14781
// #define SOC_GPIO_FLEX_GLITCH_FILTER_NUM 8 // TODO: [ESP32S31] IDF-14781
#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
#define SOC_GPIO_FLEX_GLITCH_FILTER_NUM 8
#define SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1
// GPIO peripheral has the ETM extension
components/soc/esp32s31/ld/esp32s31.peripherals.ld
-3
View File
@@ -74,9 +74,6 @@ PROVIDE ( TIMERG1 = 0x20581000 );
PROVIDE ( IO_MUX = 0x20582000 );
PROVIDE ( GPIO = 0x20583000 );
PROVIDE ( GPIO_EXT = 0x20583E00 );
PROVIDE ( SDM = 0x20583E04 );
PROVIDE ( GLITCH_FILTER = 0x20583E08 );
PROVIDE ( GPIO_ETM = 0x20583F18 );
PROVIDE ( MSPI_IOMUX = 0x20584000 );
PROVIDE ( HP_SYSTEM = 0x20586000 );
PROVIDE ( HP_SYS_CLKRST = 0x20587000 );
components/soc/esp32s31/register/soc/gpio_ext_struct.h
-3
View File
@@ -241,9 +241,6 @@ typedef struct {
volatile gpio_ext_version_reg_t version;
} gpio_ext_dev_t;
extern gpio_sd_dev_t SDM;
extern gpio_glitch_filter_dev_t GLITCH_FILTER;
extern gpio_etm_dev_t GPIO_ETM;
extern gpio_ext_dev_t GPIO_EXT;
#ifndef __cplusplus