e8069a963d
Merge branch 'bugfix/fix_some_wifi_bugs_260312_v5.4' into 'release/v5.4'
...
Bugfix/fix some wifi bugs 260312 v5.4
See merge request espressif/esp-idf!46542
2026-03-13 19:19:27 +08:00
54c2126abf
bugfix: clear regdma status when restart
2026-03-12 14:53:43 +08:00
f7395255da
test: format all test scripts
2026-03-11 07:34:34 +01:00
e8668364c2
Merge branch 'fix/eh_frame_parser_warnings_v5.4' into 'release/v5.4'
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fix(esp_system): fix potential warnings related to array size in .eh_frame parser (backport v5.4)
See merge request espressif/esp-idf!41984
2026-01-30 16:06:55 +08:00
b084ccefd5
fix(esp_system): fix potential warnings related to array size in .eh_frame parser
2026-01-27 10:28:28 +08:00
944d03a7f9
feat(esp32c6): auto adjust LDO voltage using pvt function
2026-01-26 10:50:38 +08:00
6e79470894
fix(esp_system): fix rom secure boot fast wake feature for c5/c6/h2/h21
2026-01-12 19:04:07 +08:00
eb64ef291a
Merge branch 'fix/fix_xtal32k_power_breaks_adc_v5.4' into 'release/v5.4'
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fix(esp_system): fix XTAL32K power breaks ADC function on 32k XTAL clock pin (v5.4)
See merge request espressif/esp-idf!43372
2025-12-03 10:32:17 +08:00
7bb3b130ce
fix(uart): fix RTC wdt get triggered due to uart sclk not exist on C5
...
RTC wdt would get triggered on esp_restart if uart driver was deleted before
2025-11-24 11:38:07 +08:00
aef9061d93
fix(console): release default console UART pins if console is switched in bootloader
...
Also print out console UART pin number in app cpu_startup stage
Closes https://github.com/espressif/esp-idf/issues/16764
Closes https://github.com/espressif/esp-idf/issues/17459
2025-11-22 17:52:31 +08:00
14dd2d23fa
Merge branch 'feature/esp32p4_eco5_io_hold_v5.4' into 'release/v5.4'
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feat(gpio): add IO hold support for Deep-sleep for ESP32-P4 ECO5 (v5.4)
See merge request espressif/esp-idf!43309
2025-11-19 16:32:25 +08:00
7f11b39856
Merge branch 'bugfix/usb_dp_pin_unusable_after_cpu_reset_v5.4' into 'release/v5.4'
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fix(gpio): fix USB DP pin unusable after CPU reset for S3/C3 (v5.4)
See merge request espressif/esp-idf!42801
2025-11-19 15:45:59 +08:00
b9819b3ed8
fix(clk): add compile warning if 400MHz CPU freq is used on ESP32P4 less than rev3
2025-11-18 11:30:24 +08:00
5b576f9ece
fix(gpio): fix USB DP pin unusable after CPU reset for S3/C3
...
Closes https://github.com/espressif/esp-idf/issues/17488
2025-11-14 21:00:50 +08:00
7168e29678
fix(esp_system): fix XTAL32K power breaks ADC function on 32k XTAL clock pin
2025-11-14 14:14:29 +08:00
55f3730ba4
feat(2ddma): ESP32P4 ECO5 2DDMA related updates
...
Added one more pair of 2DDMA channels
Priority bit width increased corespondingly
Added three new CSC modes for RX channel 0
2025-11-13 15:47:15 +08:00
477c861339
Merge branch 'fix/cdcacm-callback-placement_v5.4' into 'release/v5.4'
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fix(esp_vfs_console): Update placement of cdcacm_xx_cb when ETS print enabled (v5.4)
See merge request espressif/esp-idf!41332
2025-11-10 21:50:23 +08:00
18475ffbe5
fix(esp_hw_support): add p4 rev3.0 MSPI workaround for deepsleep
2025-11-04 16:03:31 +08:00
80971b25da
Merge branch 'feat/p4_eco5_real_chip_v5.4' into 'release/v5.4'
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p4: p4 eco5 real chip (v5.4)
See merge request espressif/esp-idf!42063
2025-10-26 22:38:34 +08:00
5583963765
Merge branch 'fix/clear_force_on_reg_for_cache_v5.4' into 'release/v5.4'
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fix(clk): do not clear force_on reg for cache (v5.4)
See merge request espressif/esp-idf!42178
2025-10-26 22:27:28 +08:00
147ec10b86
dma: fixed issue that DMA are not reset when CPU reset
...
When DMA keep writing the memory, some data may be corrupted after reset. For example, the stack of bootloader may be overwritten and failed to boot until a higher scope of reset (Core).
2025-10-25 02:15:23 +08:00
a70a29b7a6
feat(p4): p4 rev3 real chip support
2025-10-13 15:24:14 +08:00
ea4451d6b3
feat(clk): add 100m/200m/400m cpu freq & change clk cal & change blk version
2025-10-13 15:24:14 +08:00
b3fd689da9
feat(esp32p4): support rev3 on fpga
2025-10-13 15:24:14 +08:00
b20d8c1afb
fix(esp_system): fix ext 32k io revoking breaks sleep io holding
2025-10-10 20:20:50 +08:00
651607d1ed
fix(esp_vfs_console): Update placement of cdcacm_xx_cb when ETS print enabled
2025-10-01 08:43:44 +02:00
6e5f96136d
fix(clk): clear force_on reg for cache
2025-09-29 13:48:09 +08:00
12b8f9c9d5
Merge branch 'fix/eh_frame_infinite_loop_v5.4' into 'release/v5.4'
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fix(esp_system): prevent .eh_frame-based unwinding from looping indefinitely (release v5.4)
See merge request espressif/esp-idf!41579
2025-09-19 02:20:06 +08:00
27456ea2f3
feat(ipc): Allow IPC recursion calls in esp_ipc_call
2025-09-16 10:38:46 +03:00
1285e19cab
fix(esp_system): prevent .eh_frame-based unwinding from looping indefinitely
2025-08-28 09:54:36 +08:00
378bab6e55
Merge branch 'feat/usb-cdc-select_v5.4' into 'release/v5.4'
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feat(usb_cdc): Add select functionality (backport v5.4)
See merge request espressif/esp-idf!40892
2025-08-26 10:51:11 +08:00
00f4245160
fix(console): fixed secondary console not working on all chips without VFS
2025-08-22 09:38:46 +08:00
17037437ff
fix(panic_handler): Fixed a issue where the system reboots before halt
...
This commit fixes an issue where the panic handler may reboot even if it
is configured to halt the CPU.
Closes https://github.com/espressif/esp-idf/issues/17260
2025-08-14 11:03:24 +02:00
d9251d7efd
Merge branch 'bugfix/brownout_log_v5.4' into 'release/v5.4'
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fix: change brownout log from INFO to ERROR (v5.4)
See merge request espressif/esp-idf!40960
2025-08-04 10:38:18 +08:00
f778e6fcac
fix: change brownout log from INFO to ERROR
2025-08-01 08:48:23 +05:30
d5dca1a78d
feat(usb_cdc): Add select functionality
2025-07-29 10:14:19 +02:00
1de92b2e70
fix(esp_hw_support): enable ESP_SLEEP_RTC_FAST_USE_XTAL_MODE only once in RTC_FAST selection
2025-07-25 16:51:58 +08:00
37d25de531
fix(esp_system): force enable uart0 sclk in esp_restart
2025-07-03 19:16:56 +08:00
34b8f67a89
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4
2025-06-25 18:22:02 +08:00
ea03622621
ci(esp32c61): remove c61 support from readme on 5.4
2025-06-17 15:09:40 +08:00
fd7cfe0b04
fix(esp_system): fix RTC reserved area alignment in the linker script
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Make sure the size of the RTC reserved area complies with the alignment requirement.
Closes https://github.com/espressif/esp-idf/issues/13082
2025-05-27 11:20:07 +08:00
fc5b878c65
Merge branch 'fix/remove-unnecessary-select_v5.4' into 'release/v5.4'
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fix(esp_system): Remove unnecessary select from esp_system/Kconfig (v5.4)
See merge request espressif/esp-idf!37520
2025-05-26 19:52:26 +08:00
ee04629723
Merge branch 'feat/some_xip_psram_related_optimisations_and_fixes_v5.4' into 'release/v5.4'
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feat(esp_psram): Add some wasted XIP PSRAM memory in heap and PSRAM protection (v5.4)
See merge request espressif/esp-idf!38872
2025-05-26 19:46:08 +08:00
fdca2c76f3
fix(esp_system): Remove unnecessary select from esp_system/Kconfig
2025-05-12 09:51:04 +02:00
c06fb3b759
fix(system): linker script: free unused .rtc.text memory for esp32c3/esp32s2/esp32s3
2025-05-09 11:39:24 +08:00
26586deb7d
fix(esp_psram): Add XIP PSRAM alignment gaps in heap only if PSRAM protection is enabled
2025-05-05 11:52:15 +05:30
9406fde68d
feat(cpu_region_protect): Enable basic memory protection for SPIRAM
2025-05-05 11:52:04 +05:30
f56cf54183
fix(panic_handler): Prevent race condition in panic handler
...
This commit updates all RTC WDT contexts to be local instead of global
to avoid race conditions when both cores enter the panic handler
simultaneously.
2025-04-25 09:10:58 +02:00
5cdc53df23
fix(esp_system): reset crypto peripherals before device restart
...
This change addresses a rare but critical issue observed on certain
ESP32-C3 and ESP32-S3 devices, where secure boot verification
intermittently fails due to improper cleanup of crypto peripherals
during a restart.
Background – Restart Behavior in IDF
------------------------------------
In ESP-IDF, when the device restarts (via `esp_restart()` or due to a
panic/exception), a partial peripheral reset is performed followed by a
CPU reset. However, until now, crypto-related peripherals were not
included in this selective reset sequence.
Problem Scenario
----------------
If a restart occurs while the application is in the middle of a bignum
operation (i.e., using the MPI/Bignum peripheral), the ROM code may
encounter an inconsistent peripheral state during the subsequent boot.
This leads to transient RSA-PSS secure boot verification failures.
Following such a failure, the ROM typically triggers a full-chip reset
via the watchdog timer (WDT). This full reset clears the crypto
peripheral state, allowing secure boot verification to succeed on the
next boot.
Risk with Aggressive Revocation
-------------------------------
If secure boot aggressive revocation is enabled (disabled by default in
IDF), this transient verification failure could mistakenly lead to
revocation of the secure boot digest.
If your product configuration has aggressive revocation enabled,
applying this fix is strongly recommended.
Frequency of Occurrence
-----------------------
The issue is rare and only occurs in corner cases involving
simultaneous use of the MPI peripheral and an immediate CPU reset.
Fix
---
This fix ensures that all crypto peripherals are explicitly reset prior
to any software-triggered restart (including panic scenarios),
guaranteeing a clean peripheral state for the next boot and preventing
incorrect secure boot behavior.
2025-04-23 17:53:09 +08:00
9f8548bb2d
Merge branch 'feat/enable_esp32p4_auto_clock_gate_v5.4' into 'release/v5.4'
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feat(esp_hw_support): enable auto clock gating for multi peripherals (v5.4)
See merge request espressif/esp-idf!38443
2025-04-17 17:13:40 +08:00
Jiang Jiang Jian
sibeibei
Evgeny Torbin
Marius Vikhammer
Omar Chebib
zlq
wuzhenghui
Song Ruo Jing
morris
Xiao Xufeng
armando
yanzihan@espressif.com
Guillaume Souchere
Chen Jichang
Konstantin Kondrashov
Sudeep Mohanty
Mahavir Jain
wanckl
Jan Beran
Alexey Lapshin
harshal.patil