- Also set the RX burst size correctly for AES/SHA DMA operations
with ESP-TEE
- Fix the compile-time minimum chip revision check for patching
the `ets_delay_us` API
The rom function on the s2 and s3 only counts one page for any pages
which are mapped to page 0 of flash as the Cache_Flash_To_SPIRAM_Copy
function attempts to map all flash page 0 mapped pages to one PSRAM
page.
As this function can be called for multiple regions, it needs to track
if a page mapped to page 0 has previously been accounted for by a
previous call. It does this using the page0_mapped in-out parameter.
This logic contains an error:
```
if (*page0_mapped == 0) {
// BUG: If page0_count is 0, 1 is still added
count = valid_flash_count + 1 - page0_count;
} else {
count = valid_flash_count - page0_count;
}
*page0_mapped += page0_count;
return count;
```
The current Cache_Count_Flash_Pages wrapper in the idf attempts to
compensate for this bug by checking if the page0_mapped parameter was
changed by a call to the function and reducing the count if it has not.
This, however, will incorrectly over-compensate in situations where the
initial value of page0_mapped was not zero as the code above only
miscounts when it was zero.
This patch addresses the issue in this wrapper function by correctly
compensating for the bug only in cases where the final page0_mapped
value is 0.
The new TLSF architecture has changed. tlsf.h public API
header is now moved into an include folder. tlsf_common.h
is removed from the repo.
This commit updates the heap component and respective
esp_rom patches to take into account this new
architecture.
The original ROM function enabled output for the pad first, and then connected the signal
This could result in an undesired level change at the pad
Closes https://github.com/espressif/esp-idf/issues/12826
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
Laukik Hase
wanckl
C.S.M
morris
Omar Chebib
Alexey Lapshin
Marius Vikhammer
Song Ruo Jing
Konstantin Kondrashov
Guillaume Souchere
Chen Jichang
Tomasz Kramkowski
gaoxu
Li Bo
Armando
Jiang Guang Ming
Fu Zhibo