espressif/esp-idf

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Marius Vikhammer c1256efd67 docs: clarify PSRAM default allocation behavior

Clarify that MALLOC_CAP_DEFAULT describes a memory capability
rather than the malloc() placement policy, so PSRAM-backed
capability allocations are documented correctly when malloc()
remains internal-only by default.

Closes https://github.com/espressif/esp-idf/issues/18391

Made-with: Cursor

2026-03-25 15:35:21 +08:00

..

change(mem): deprecated tcm and added scp memory utils

2026-03-11 11:18:15 +08:00

feat(psram): allow PSRAM to enter halfsleep mode during light sleep

2026-02-28 22:33:34 +08:00

feat(mspi): supported psram & flash 120MHz timing tuning

2025-10-28 09:52:36 +08:00

feat(mspi): support 120MHz flash and psram for esp32c61

2026-01-21 14:38:04 +08:00

fix(clk): update H4 to use 64MHz clock for mspi

2026-01-04 14:07:01 +08:00

change(psram): use 200M as default

2025-11-17 16:25:57 +08:00

feat(psram): allow PSRAM to enter halfsleep mode during light sleep

2026-02-28 22:33:34 +08:00

feat(psram): allow PSRAM to enter halfsleep mode during light sleep

2026-02-28 22:33:34 +08:00

fix(psram): cleanup PSRAM_MSPI_MB_WORKAROUND to avoid future issue

2026-01-22 02:55:12 +08:00

feat(mspi): add clear log in psram mspi intr isr for addr misaligned error

2026-02-26 16:38:06 +08:00

feat(psram): allow PSRAM to enter halfsleep mode during light sleep

2026-02-28 22:33:34 +08:00

refactor(global): remove completed todos in the codebase

2025-12-15 22:40:15 +08:00

CMakeLists.txt

feat(psram): allow PSRAM to enter halfsleep mode during light sleep

2026-02-28 22:33:34 +08:00

Kconfig

…

Kconfig.spiram.common

docs: clarify PSRAM default allocation behavior

2026-03-25 15:35:21 +08:00

linker.lf

feat(esp_psram): Add a new API to just detect and enable the PSRAM

2025-04-29 11:48:27 +05:30

project_include.cmake

feat(build): propagate compiler flags from files to toolchain.cmake

2025-11-14 21:04:54 +07:00

README.md

feat(mspi): supported mspi flash and psram isr

2025-12-26 01:04:45 +00:00

sdkconfig.rename.esp32s2

…

sdkconfig.rename.esp32s3

…

README.md

PSRAM MSPI Interrupt Handling

Overview

This file (system_layer/esp_psram_mspi.c) handles PSRAM-specific MSPI interrupt registration.

Chip Type	`MSPI_LL_INTR_SHARED`	Behavior
Shared IRQ	1	Register to shared MSPI dispatcher
Separate IRQ	0	Register standalone PSRAM ISR via `esp_intr_alloc()`

Documentation

For detailed architecture, flow diagrams, and API reference, see:

esp_hw_support/README.md - MSPI Interrupt Logic