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feat(soc): ESP32-S31: enable SOC_ASYNCHRONOUS_BUS_ERROR_MODE
- Enable SOC_ASYNCHRONOUS_BUS_ERROR_MODE to correct MEPC value when debugging. - Enable gdbstub test_hwloop_jump and test_coproc_registers
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@@ -539,6 +539,10 @@ config SOC_RCC_IS_INDEPENDENT
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bool
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default y
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config SOC_ASYNCHRONOUS_BUS_ERROR_MODE
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bool
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default y
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config SOC_PM_SUPPORT_EXT1_WAKEUP
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bool
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default y
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@@ -310,7 +310,8 @@
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#define SOC_CLK_LP_FAST_SUPPORT_XTAL (1) /*!< Support XTAL clock as the LP_FAST clock source */
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#define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control has own registers for each module */
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/*-------------------------- Memory CAPS --------------------------*/
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#define SOC_ASYNCHRONOUS_BUS_ERROR_MODE (1)
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/*-------------------------- Power Management CAPS ----------------------------*/
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#define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
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#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
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@@ -63,7 +63,7 @@ def dut_get_threads(dut: PanicTestDut) -> Any:
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32p4'], indirect=['target'])
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@idf_parametrize('target', ['esp32p4', 'esp32s31'], indirect=['target'])
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def test_hwloop_jump(dut: PanicTestDut) -> None:
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start_gdb(dut)
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@@ -275,7 +275,7 @@ def coproc_registers_test(dut: PanicTestDut, regs_type: str, set_registers: Call
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@pytest.mark.generic
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@idf_parametrize('target', ['esp32', 'esp32s3', 'esp32p4'], indirect=['target'])
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@idf_parametrize('target', ['esp32', 'esp32s3', 'esp32p4', 'esp32s31'], indirect=['target'])
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def test_coproc_registers(dut: PanicTestDut) -> None:
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start_gdb(dut)
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