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https://github.com/espressif/esp-idf.git
synced 2026-04-27 19:13:21 +00:00
fix(esp_hw_support): fix RNG to LP peri domain dependency on C5
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@@ -8,8 +8,8 @@
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#include "hal/regi2c_ctrl_ll.h"
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#include "hal/adc_ll.h"
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#include "hal/adc_types.h"
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#include "hal/rng_ll.h"
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#include "esp_private/regi2c_ctrl.h"
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#include "soc/lpperi_reg.h"
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#include "hal/temperature_sensor_ll.h"
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#include "esp_private/sar_periph_ctrl.h"
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@@ -67,9 +67,9 @@ void bootloader_random_enable(void)
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adc_ll_digi_set_trigger_interval(200);
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adc_ll_digi_trigger_enable();
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SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
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REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0x3);
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SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_EN);
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rng_ll_enable_sample(true);
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rng_ll_enable_rtc_timer(true);
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rng_ll_enable_rng_timer(true);
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}
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void bootloader_random_disable(void)
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@@ -25,6 +25,9 @@
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#if SOC_RNG_CLOCK_IS_INDEPENDENT
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#include "hal/lp_clkrst_ll.h"
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#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE || SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
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#include "hal/rng_ll.h"
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#endif
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#endif
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#if defined CONFIG_IDF_TARGET_ESP32S3
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@@ -106,15 +109,10 @@ void esp_fill_random(void *buf, size_t len)
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#if SOC_RNG_CLOCK_IS_INDEPENDENT && !ESP_TEE_BUILD
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ESP_SYSTEM_INIT_FN(init_rng, SECONDARY, BIT(0), 102)
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{
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#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE || SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
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rng_ll_enable();
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#else
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_lp_clkrst_ll_enable_rng_clock(true);
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#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE
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SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
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#endif
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#if SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
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// This would only be effective if the RTC clock is enabled
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REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0x3);
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SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_EN);
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#endif
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return ESP_OK;
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}
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@@ -41,6 +41,10 @@
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#include "hal/rtc_io_hal.h"
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#include "hal/clk_tree_hal.h"
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#if SOC_IS(ESP32C5) // Remove after all chips rng_ll.h implemented
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#include "hal/rng_ll.h"
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#endif
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#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
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#include "hal/systimer_ll.h"
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#endif
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@@ -856,6 +860,13 @@ static SLEEP_FN_ATTR void misc_modules_wake_prepare(uint32_t sleep_flags)
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#if SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION
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regi2c_tsens_reg_write();
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#endif
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#if RNG_LL_DEPENDS_ON_LP_PERIPH
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if (sleep_flags & PMU_SLEEP_PD_LP_PERIPH) {
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// Re-enable the RNG module.
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rng_ll_reset();
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rng_ll_enable();
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}
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#endif
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}
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static SLEEP_FN_ATTR void sleep_low_power_clock_calibration(bool is_dslp)
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@@ -0,0 +1,88 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "soc/lpperi_struct.h"
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#include "hal/lp_clkrst_ll.h"
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#define RNG_LL_DEPENDS_ON_LP_PERIPH 1
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Enable or disable RNG sampling.
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*
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* @param enable True to enable, False to disable
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*/
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static inline void rng_ll_enable_sample(bool enable)
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{
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LPPERI.rng_cfg.rng_sample_enable = enable;
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}
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/**
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* @brief Enable or disable rng xor rtc timer.
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*
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* @param enable True to enable, False to disable
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*/
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static inline void rng_ll_enable_rtc_timer(bool enable)
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{
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LPPERI.rng_cfg.rtc_timer_en = enable ? 0x3 : 0x0;
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}
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/**
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* @brief Enable or disable rng xor async rng timer.
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*
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* @param enable True to enable, False to disable
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*/
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static inline void rng_ll_enable_rng_timer(bool enable)
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{
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LPPERI.rng_cfg.rng_timer_en = enable;
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}
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/**
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* @brief Reset RNG.
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*/
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static inline void rng_ll_reset(void)
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{
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LPPERI.reset_en.lp_rng_reset_en = 1;
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LPPERI.reset_en.lp_rng_reset_en = 0;
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}
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/**
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* @brief Enable RNG module
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*
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* TODO: unify in rng_hal.c
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*/
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static inline void rng_ll_enable(void)
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{
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_lp_clkrst_ll_enable_rng_clock(true);
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rng_ll_enable_sample(true);
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rng_ll_enable_rtc_timer(true);
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rng_ll_enable_rng_timer(true);
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}
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/**
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* @brief Disable RNG module
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*
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* TODO: unify in rng_hal.c
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*/
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static inline void rng_ll_disable(void)
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{
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rng_ll_enable_sample(false);
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rng_ll_enable_rtc_timer(false);
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rng_ll_enable_rng_timer(false);
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_lp_clkrst_ll_enable_rng_clock(false);
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}
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#ifdef __cplusplus
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}
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#endif
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