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Merge branch 'feat/make_p4_rev3_default' into 'master'

Browse Source 
p4: make v3 as default

See merge request espressif/esp-idf!43142
This commit is contained in:
Armando (Dou Yiwen)
2025-11-17 10:10:05 +00:00
parent a7d2fb7d02 b25ba4a0c1
commit 1275fb1f42
126 changed files with 2224 additions and 2150 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/app_update/test_apps/test_app_update/.build-test-rules.yml
+3
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@@ -15,6 +15,9 @@ components/app_update/test_apps:
- if: IDF_TARGET == "esp32c61" and CONFIG_NAME == "xip_psram_with_rom_impl"
temporary: true
reason: not supported yet # TODO: [ESP32C61] IDF-12784
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14401
disable_test:
- if: CONFIG_NAME == "recovery_bootloader" and SOC_RECOVERY_BOOTLOADER_SUPPORTED == 1 and IDF_TARGET == "esp32c61"
temporary: true
components/app_update/test_apps/test_app_update/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- |
components/cxx/test_apps/.build-test-rules.yml
+4
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@@ -5,3 +5,7 @@ components/cxx/test_apps:
- if: IDF_TARGET in ["esp32", "esp32c3", "esp32c61", "esp32p4"]
temporary: true
reason: the other targets are not tested yet
disable:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14402
components/cxx/test_apps/exception/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 | ESP32-P4 |
| ----------------- | ----- | -------- | --------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 |
| ----------------- | ----- | -------- | --------- |
components/cxx/test_apps/exception_no_except/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 | ESP32-P4 |
| ----------------- | ----- | -------- | --------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 |
| ----------------- | ----- | -------- | --------- |
components/cxx/test_apps/general/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 | ESP32-P4 |
| ----------------- | ----- | -------- | --------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 |
| ----------------- | ----- | -------- | --------- |
components/cxx/test_apps/rtti/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 | ESP32-P4 |
| ----------------- | ----- | -------- | --------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C61 |
| ----------------- | ----- | -------- | --------- |
components/driver/test_apps/.build-test-rules.yml
+3
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@@ -12,6 +12,9 @@ components/driver/test_apps/legacy_twai:
disable:
- if: SOC_TWAI_SUPPORTED != 1 or SOC_TWAI_SUPPORT_FD == 1
reason: legacy driver doesn't support FD
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14393
depends_filepatterns:
- components/driver/twai/**/*
depends_components:
components/driver/test_apps/legacy_twai/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-H21 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-H21 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- |
# Enable Socket CAN Device with bitrate 250Kbps
components/efuse/esp32p4/sources.cmake
+1
View File
@@ -6,6 +6,7 @@ set(EFUSE_SOC_SRCS
if(CONFIG_ESP32P4_REV_MIN_FULL GREATER_EQUAL 300)
list(APPEND EFUSE_SOC_SRCS
"esp_efuse_table_v3.0.c"
"esp_efuse_rtc_calib.c"
)
else()
list(APPEND EFUSE_SOC_SRCS
components/efuse/test_apps/.build-test-rules.yml
+4
View File
@@ -3,6 +3,10 @@
components/efuse/test_apps:
enable:
- if: (INCLUDE_DEFAULT == 1 and SOC_EFUSE_SUPPORTED == 1) or IDF_TARGET == "linux")
disable:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14403
disable_test:
- if: IDF_TARGET in ["esp32s2", "esp32s3"]
reason: eFuse for S2 and S3 is similar to the C3 chip, so we only test for C3.
components/efuse/test_apps/README.md
+2 -2
View File
@@ -1,3 +1,3 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | Linux |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | ----- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S2 | ESP32-S3 | Linux |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | ----- |
components/esp_adc/test_apps/.build-test-rules.yml
+4
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@@ -4,6 +4,10 @@ components/esp_adc/test_apps/adc:
disable:
- if: SOC_ADC_SUPPORTED != 1
- if: CONFIG_NAME == "gdma_iram_safe" and IDF_TARGET in ["esp32", "esp32s2", "esp32c2"]
disable_test:
- if: IDF_TARGET == "esp32p4" and CONFIG_NAME != "esp32p4_eco4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14357
depends_components:
- esp_adc
- esp_driver_gpio
components/esp_adc/test_apps/adc/pytest_adc.py
+14
View File
@@ -12,6 +12,7 @@ from pytest_embedded_idf.utils import idf_parametrize
['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32c5', 'esp32p4', 'esp32c61'],
indirect=['target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14357')
def test_adc(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=120, reset=True)
@@ -30,3 +31,16 @@ def test_adc(dut: Dut) -> None:
@idf_parametrize('target', ['esp32c2'], indirect=['target'])
def test_adc_esp32c2_xtal_26mhz(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=120, reset=True)
# P4 REV2 adc
@pytest.mark.adc
@pytest.mark.esp32p4_eco4
@pytest.mark.parametrize('config', ['esp32p4_eco4'], indirect=True)
@idf_parametrize(
'target',
['esp32p4'],
indirect=['target'],
)
def test_adc_p4_rev2(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=120, reset=True)
components/esp_adc/test_apps/adc/sdkconfig.ci.esp32p4_eco4
+2
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@@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32p4"
CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y
components/esp_common/test_apps/.build-test-rules.yml
+3
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@@ -5,3 +5,6 @@ components/esp_common/test_apps/esp_common:
- if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1
- if: CONFIG_NAME == "psram_noinit" and SOC_SPIRAM_SUPPORTED != 1
- if: CONFIG_NAME == "xip_psram" and SOC_SPIRAM_XIP_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14404
components/esp_common/test_apps/esp_common/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
components/esp_driver_cam/test_apps/.build-test-rules.yml
+3
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@@ -1,6 +1,9 @@
components/esp_driver_cam/test_apps/csi:
disable:
- if: SOC_MIPI_CSI_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4" # TODO: IDF-14358
temporary: true
reason: p4 rev3 migration
depends_components:
- esp_driver_cam
components/esp_driver_i2c/test_apps/i2c_test_apps/pytest_i2c.py
+1
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@@ -21,6 +21,7 @@ def test_i2c(dut: Dut) -> None:
@pytest.mark.generic_multi_device
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14395')
@pytest.mark.parametrize(
'count, config',
[
components/esp_driver_i2s/test_apps/.build-test-rules.yml
+1 -1
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@@ -12,7 +12,7 @@ components/esp_driver_i2s/test_apps/i2s_multi_dev:
- if: SOC_I2S_SUPPORTED != 1
- if: SOC_I2S_HW_VERSION_2 != 1
disable_test:
- if: IDF_TARGET in ["esp32c61"] # TODO: [ESP32C61] IDF-11442
- if: IDF_TARGET in ["esp32c61", "esp32p4"] # TODO: [ESP32C61] IDF-11442, TODO: IDF-14396
temporary: true
reason: lack of runners
depends_components:
components/esp_driver_i2s/test_apps/i2s_multi_dev/pytest_i2s_multi_dev.py
+1
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@@ -6,6 +6,7 @@ from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic_multi_device
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14396')
@pytest.mark.parametrize('count', [2], indirect=True)
@idf_parametrize('target', soc_filtered_targets('SOC_I2S_SUPPORTS_TDM == 1'), indirect=['target'])
def test_i2s_multi_dev(case_tester) -> None: # type: ignore
components/esp_driver_i3c/test_apps/i3c_test_apps/pytest_i3c.py
+1
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@@ -21,6 +21,7 @@ def test_i3c(dut: Dut) -> None:
@pytest.mark.generic_multi_device
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14397')
@pytest.mark.parametrize(
'count, config',
[
components/esp_driver_ledc/test_apps/.build-test-rules.yml
+4
View File
@@ -3,5 +3,9 @@
components/esp_driver_ledc/test_apps/ledc:
disable:
- if: SOC_LEDC_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14398
depends_components:
- esp_driver_ledc
components/esp_driver_ledc/test_apps/ledc/pytest_ledc.py
+2
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@@ -16,6 +16,7 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14398')
def test_ledc(dut: IdfDut) -> None:
dut.run_all_single_board_cases(reset=True)
@@ -35,6 +36,7 @@ def test_ledc_psram(dut: IdfDut) -> None:
@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='s3 multi device runner has no psram')
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14398')
@pytest.mark.generic_multi_device
@pytest.mark.parametrize(
'count, config',
components/esp_driver_mcpwm/test_apps/.build-test-rules.yml
+4
View File
@@ -3,5 +3,9 @@
components/esp_driver_mcpwm/test_apps/mcpwm:
disable:
- if: SOC_MCPWM_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14412
depends_components:
- esp_driver_mcpwm
components/esp_driver_mcpwm/test_apps/mcpwm/pytest_mcpwm.py
+1
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@@ -15,5 +15,6 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['esp32', 'esp32s3', 'esp32c5', 'esp32c6', 'esp32h2', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14412')
def test_mcpwm(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_driver_parlio/test_apps/.build-test-rules.yml
+4
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@@ -3,5 +3,9 @@
components/esp_driver_parlio/test_apps/parlio:
disable:
- if: SOC_PARLIO_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14413
depends_components:
- esp_driver_parlio
components/esp_driver_parlio/test_apps/parlio/pytest_parlio_unity.py
+1
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@@ -15,5 +15,6 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32h2', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14413')
def test_parlio(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_driver_rmt/test_apps/.build-test-rules.yml
+4
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@@ -3,5 +3,9 @@
components/esp_driver_rmt/test_apps/rmt:
disable:
- if: SOC_RMT_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14414
depends_components:
- esp_driver_rmt
components/esp_driver_rmt/test_apps/rmt/pytest_rmt.py
+1
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@@ -17,6 +17,7 @@ from pytest_embedded_idf.utils import idf_parametrize
@idf_parametrize(
'target', ['esp32', 'esp32s2', 'esp32c3', 'esp32c5', 'esp32c6', 'esp32h2', 'esp32p4'], indirect=['target']
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14414')
def test_rmt(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_driver_sdio/test_apps/.build-test-rules.yml
+4
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@@ -2,6 +2,10 @@ components/esp_driver_sdio/test_apps/sdio/sdio_common_tests/host_sdmmc:
enable:
- if: IDF_TARGET in ["esp32", "esp32p4"]
reason: runners use ESP32 / ESP32P4 SDMMC as host
disable:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14359
depends_components:
- sdmmc
- esp_driver_sdmmc
components/esp_driver_sdio/test_apps/sdio/sdio_common_tests/host_sdmmc/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-P4 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 |
| ----------------- | ----- |
# SDIO Cross Chips Test Apps: SDMMC Host App
components/esp_driver_sdspi/test_apps/.build-test-rules.yml
+3
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@@ -1,6 +1,9 @@
components/esp_driver_sdspi/test_apps/sdspi:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14363
disable_test:
- if: IDF_TARGET not in ["esp32", "esp32s3", "esp32c3", "esp32c5", "esp32p4"]
reason: needs special runner, select few typical targets for testing
components/esp_driver_sdspi/test_apps/sdspi/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
components/esp_driver_spi/test_apps/.build-test-rules.yml
+4
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@@ -9,6 +9,10 @@
components/esp_driver_spi/test_apps/master:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14399
<<: *spi_depends_default
components/esp_driver_spi/test_apps/param:
components/esp_driver_spi/test_apps/master/pytest_spi_master.py
+2
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@@ -14,6 +14,7 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14399')
def test_master_single_dev(case_tester) -> None: # type: ignore
for case in case_tester.test_menu:
if 'test_env' in case.attributes:
@@ -39,6 +40,7 @@ def test_master_esp_flash(case_tester) -> None: # type: ignore
@pytest.mark.generic_multi_device
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14399')
@pytest.mark.parametrize(
'count, config',
[
components/esp_driver_spi/test_apps/param/pytest_spi_param.py
+1
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@@ -13,5 +13,6 @@ def test_param_single_dev(case_tester) -> None: # type: ignore
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2], indirect=True)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14399')
def test_param_multi_dev(case_tester) -> None: # type: ignore
case_tester.run_all_multi_dev_cases(reset=True)
components/esp_driver_spi/test_apps/slave/pytest_spi_slave.py
+1
View File
@@ -13,6 +13,7 @@ def test_slave_single_dev(case_tester) -> None: # type: ignore
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count, config', [(2, 'release'), (2, 'iram_safe')], indirect=True)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14399')
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
def test_slave_multi_dev(case_tester) -> None: # type: ignore
case_tester.run_all_multi_dev_cases(reset=True)
components/esp_driver_spi/test_apps/slave_hd/pytest_spi_slave_hd.py
+1
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@@ -15,6 +15,7 @@ def test_slave_hd_single_dev(case_tester) -> None: # type: ignore
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count, config', [(2, 'release')], indirect=True)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14399')
@idf_parametrize('target', soc_filtered_targets('SOC_SPI_SUPPORT_SLAVE_HD_VER2 == 1'), indirect=['target'])
def test_slave_hd_multi_dev(case_tester) -> None: # type: ignore
case_tester.run_all_multi_dev_cases(reset=True)
components/esp_driver_twai/test_apps/.build-test-rules.yml
+3
View File
@@ -1,5 +1,8 @@
components/esp_driver_twai/test_apps/test_twai:
disable:
- if: SOC_TWAI_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14393
depends_components:
- esp_driver_twai
components/esp_driver_twai/test_apps/test_twai/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- |
components/esp_driver_usb_serial_jtag/test_apps/.build-test-rules.yml
+6
View File
@@ -3,6 +3,9 @@
components/esp_driver_usb_serial_jtag/test_apps/usb_serial_jtag:
disable:
- if: SOC_USB_SERIAL_JTAG_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14364
disable_test:
- if: IDF_TARGET in ["esp32c5", "esp32h4", "esp32h21"]
temporary: true
@@ -15,6 +18,9 @@ components/esp_driver_usb_serial_jtag/test_apps/usb_serial_jtag:
components/esp_driver_usb_serial_jtag/test_apps/usb_serial_jtag_vfs:
disable:
- if: SOC_USB_SERIAL_JTAG_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14364
disable_test:
- if: IDF_TARGET in ["esp32c5", "esp32h4", "esp32h21"]
temporary: true
components/esp_driver_usb_serial_jtag/test_apps/usb_serial_jtag/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
| Supported Targets | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- |
components/esp_driver_usb_serial_jtag/test_apps/usb_serial_jtag_vfs/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
| Supported Targets | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- |
components/esp_eth/test_apps/.build-test-rules.yml
+1 -1
View File
@@ -2,7 +2,7 @@
components/esp_eth/test_apps:
enable:
- if: IDF_TARGET in ["esp32", "esp32p4"]
- if: IDF_TARGET in ["esp32"] # TODO: IDF-14365
reason: ESP32 and ESP32P4 have internal EMAC. SPI Ethernet runners are based on ESP32.
depends_components:
- esp_eth
components/esp_eth/test_apps/README.md
+2 -2
View File
@@ -1,6 +1,6 @@
# EMAC Test
| Supported Targets | ESP32 | ESP32-P4 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 |
| ----------------- | ----- |
This test app is used to test Ethernet MAC behavior with different chips.
components/esp_hw_support/lowpower/port/esp32p4/sleep_cpu.c
+4
View File
@@ -387,6 +387,7 @@ static TCM_IRAM_ATTR void smp_core_do_retention(void)
// Wait another core start to do retention
bool smp_skip_retention = false;
smp_retention_state_t another_core_state;
ESP_COMPILER_DIAGNOSTIC_PUSH_IGNORE("-Wanalyzer-infinite-loop")
while (1) {
another_core_state = atomic_load(&s_smp_retention_state[!core_id]);
if (another_core_state == SMP_SKIP_RETENTION) {
@@ -397,6 +398,7 @@ static TCM_IRAM_ATTR void smp_core_do_retention(void)
break;
}
}
ESP_COMPILER_DIAGNOSTIC_POP("-Wanalyzer-infinite-loop")
if (!smp_skip_retention) {
atomic_store(&s_smp_retention_state[core_id], SMP_BACKUP_START);
@@ -458,9 +460,11 @@ void sleep_smp_cpu_wakeup_prepare(void)
#if CONFIG_PM_ESP_SLEEP_POWER_DOWN_CPU
uint8_t core_id = esp_cpu_get_core_id();
if (atomic_load(&s_smp_retention_state[core_id]) == SMP_RESTORE_DONE) {
ESP_COMPILER_DIAGNOSTIC_PUSH_IGNORE("-Wanalyzer-infinite-loop")
while (atomic_load(&s_smp_retention_state[!core_id]) != SMP_RESTORE_DONE) {
;
}
ESP_COMPILER_DIAGNOSTIC_POP("-Wanalyzer-infinite-loop")
}
atomic_store(&s_smp_retention_state[core_id], SMP_IDLE);
#else
components/esp_hw_support/port/esp32p4/Kconfig.hw_support
+1 -1
View File
@@ -3,7 +3,7 @@ comment "Read the help text of the option below for explanation"
config ESP32P4_SELECTS_REV_LESS_V3
bool "Select ESP32-P4 revisions <3.0 (No >=3.x Support)"
default y
default n
help
Select this option to support ESP32-P4 revisions 0.x and 1.x.
Revisions higher than 3.0 (included) and revisions less than 3.0
components/esp_hw_support/test_apps/.build-test-rules.yml
+16 -2
View File
@@ -13,6 +13,10 @@ components/esp_hw_support/test_apps/dma:
components/esp_hw_support/test_apps/dma2d:
disable:
- if: SOC_DMA2D_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14471
depends_filepatterns:
- components/esp_hw_support/dma/**/*
depends_components:
@@ -25,6 +29,9 @@ components/esp_hw_support/test_apps/host_test_linux:
components/esp_hw_support/test_apps/mspi:
disable:
- if: IDF_TARGET not in ["esp32s3", "esp32p4"]
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14366
components/esp_hw_support/test_apps/mspi_psram_with_dfs:
disable:
@@ -37,6 +44,10 @@ components/esp_hw_support/test_apps/rtc_8md256:
components/esp_hw_support/test_apps/rtc_clk:
disable:
- if: SOC_CLK_TREE_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14441
components/esp_hw_support/test_apps/rtc_power_modes:
enable:
@@ -65,11 +76,14 @@ components/esp_hw_support/test_apps/usb_phy:
components/esp_hw_support/test_apps/vad_wakeup:
disable:
- if: SOC_LP_VAD_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14368
components/esp_hw_support/test_apps/wakeup_tests:
enable:
- if: SOC_DEEP_SLEEP_SUPPORTED == 1 and SOC_LIGHT_SLEEP_SUPPORTED == 1
disable_test:
- if: IDF_TARGET in ["esp32c61", "esp32h21", "esp32h4"]
- if: IDF_TARGET in ["esp32c61", "esp32h21", "esp32h4", "esp32p4"]
temporary: true
reason: lack of runners
reason: lack of runners # TODO: IDF-14400
components/esp_hw_support/test_apps/dma2d/pytest_dma2d.py
+1
View File
@@ -15,5 +15,6 @@ from pytest_embedded_idf.utils import soc_filtered_targets
indirect=True,
)
@idf_parametrize('target', soc_filtered_targets('SOC_DMA2D_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14471')
def test_dma2d(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_hw_support/test_apps/mspi/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32-P4 | ESP32-S3 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-S3 |
| ----------------- | -------- |
This project tests if Flash and PSRAM can work under different configurations.
To add new configuration, create one more sdkconfig.ci.NAME file in this directory.
components/esp_hw_support/test_apps/rtc_clk/pytest_rtc_clk.py
+1
View File
@@ -10,6 +10,7 @@ from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_CLK_TREE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14441')
def test_rtc_clk(case_tester: CaseTester) -> None:
for case in case_tester.test_menu:
if 'test_env' in case.attributes:
components/esp_hw_support/test_apps/wakeup_tests/pytest_wakeup_tests.py
+6 -4
View File
@@ -1,7 +1,6 @@
# SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
from time import sleep
from typing import Tuple
import pytest
from pytest_embedded_idf.dut import IdfDut
@@ -40,6 +39,7 @@ available_rtcio_nums = {
@pytest.mark.generic_multi_device
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14400')
@pytest.mark.parametrize('count', [2], indirect=True)
@pytest.mark.parametrize('config', TEST_CONFIGS, indirect=True)
@idf_parametrize(
@@ -47,7 +47,7 @@ available_rtcio_nums = {
['esp32', 'esp32s2', 'esp32s3', 'esp32c6', 'esp32h2', 'esp32p4', 'esp32c5'],
indirect=['target'],
)
def test_ext1_deepsleep(dut: Tuple[IdfDut, IdfDut]) -> None:
def test_ext1_deepsleep(dut: tuple[IdfDut, IdfDut]) -> None:
wakee = dut[0]
waker = dut[1]
@@ -97,8 +97,9 @@ def test_ext1_deepsleep(dut: Tuple[IdfDut, IdfDut]) -> None:
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2], indirect=True)
@pytest.mark.parametrize('config', TEST_CONFIGS, indirect=True)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14400')
@idf_parametrize('target', ['esp32c2', 'esp32c3', 'esp32c6', 'esp32p4', 'esp32c5'], indirect=['target'])
def test_rtcio_deepsleep(dut: Tuple[IdfDut, IdfDut]) -> None:
def test_rtcio_deepsleep(dut: tuple[IdfDut, IdfDut]) -> None:
wakee = dut[0]
waker = dut[1]
@@ -142,8 +143,9 @@ def test_rtcio_deepsleep(dut: Tuple[IdfDut, IdfDut]) -> None:
@pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2], indirect=True)
@pytest.mark.parametrize('config', TEST_CONFIGS, indirect=True)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14400')
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
def test_gpio_wakeup_enable_lightsleep(dut: Tuple[IdfDut, IdfDut]) -> None:
def test_gpio_wakeup_enable_lightsleep(dut: tuple[IdfDut, IdfDut]) -> None:
wakee = dut[0]
waker = dut[1]
components/esp_libc/test_apps/.build-test-rules.yml
+6
View File
@@ -1,5 +1,11 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_libc/test_apps/newlib:
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14415
components/esp_libc/test_apps/no_rvfplib:
disable:
- if: ESP_ROM_HAS_RVFPLIB != 1
components/esp_libc/test_apps/newlib/pytest_newlib.py
+1
View File
@@ -20,5 +20,6 @@ from pytest_embedded_idf.utils import idf_parametrize
],
indirect=['config', 'target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14415')
def test_newlib(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_mm/test_apps/.build-test-rules.yml
+7
View File
@@ -0,0 +1,7 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_mm/test_apps/mm:
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14470
components/esp_mm/test_apps/mm/pytest_mmap.py
+1
View File
@@ -71,6 +71,7 @@ def test_cache(dut: Dut) -> None:
],
indirect=['config', 'target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='h4 rev3 migration # TODO: IDF-14470')
def test_cache_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(group='cache')
components/esp_netif/test_apps/.build-test-rules.yml
+1 -1
View File
@@ -13,7 +13,7 @@ components/esp_netif/test_apps/test_app_esp_netif:
components/esp_netif/test_apps/test_app_vfs_l2tap:
disable:
- if: IDF_TARGET not in ["esp32", "esp32p4"]
- if: IDF_TARGET not in ["esp32"] # TODO: IDF-14365
temporary: true
reason: Not needed to test on all targets (chosen two, one for each architecture plus P4 tests time stamping)
depends_components:
components/esp_netif/test_apps/test_app_vfs_l2tap/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-P4 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 |
| ----------------- | ----- |
components/esp_pm/test_apps/.build-test-rules.yml
+4
View File
@@ -8,5 +8,9 @@ components/esp_pm/test_apps:
- if: IDF_TARGET in ["esp32c61", "esp32h21", "esp32h4"]
temporary: true
reason: not support yet # TODO: [ESP32C61] IDF-9250, [ESP32H21] IDF-11522, [ESP32H4] IDF-12286
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14416
depends_components:
- esp_pm
components/esp_pm/test_apps/esp_pm/pytest_esp_pm.py
+2
View File
@@ -18,6 +18,7 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14416')
def test_esp_pm(dut: Dut) -> None:
dut.run_all_single_board_cases()
@@ -53,5 +54,6 @@ def test_esp_attr_xip_psram_esp32s3(dut: Dut) -> None:
['pm_pd_top_sleep'],
)
@idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32h2', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14416')
def test_esp_pd_top_and_cpu_sleep(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_rom/test_apps/.build-test-rules.yml
+4
View File
@@ -10,6 +10,10 @@ components/esp_rom/test_apps/rom_impl_components:
- if: CONFIG_NAME == "rom_impl_components" and ((ESP_ROM_HAS_HAL_WDT != 1 and ESP_ROM_HAS_HAL_SYSTIMER != 1) and (ESP_ROM_HAS_HEAP_TLSF != 1 and ESP_ROM_HAS_SPI_FLASH != 1))
- if: CONFIG_NAME == "no_rom_impl_components" and ((ESP_ROM_HAS_HAL_WDT != 1 and ESP_ROM_HAS_HAL_SYSTIMER != 1) and (ESP_ROM_HAS_HEAP_TLSF != 1 and ESP_ROM_HAS_SPI_FLASH != 1))
- if: SOC_WDT_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14417
components/esp_rom/test_apps/rom_tests:
disable_test:
components/esp_rom/test_apps/rom_impl_components/pytest_esp_rom_impl_components.py
+1
View File
@@ -15,5 +15,6 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14417')
def test_esp_rom_impl_components(dut: Dut) -> None:
dut.run_all_single_board_cases()
components/esp_security/test_apps/.build-test-rules.yml
+4
View File
@@ -3,5 +3,9 @@
components/esp_security/test_apps/crypto_drivers:
enable:
- if: ((SOC_HMAC_SUPPORTED == 1) or (SOC_DIG_SIGN_SUPPORTED == 1)) or (SOC_KEY_MANAGER_SUPPORTED == 1)
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14418
depends_components:
- esp_security
components/esp_security/test_apps/crypto_drivers/pytest_crypto_drivers.py
+1
View File
@@ -9,5 +9,6 @@ from pytest_embedded_idf.utils import idf_parametrize
@idf_parametrize(
'target', ['esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32p4', 'esp32c5'], indirect=['target']
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14418')
def test_crypto_drivers(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=180)
components/esp_stdio/test_apps/.build-test-rules.yml
+1
View File
@@ -4,5 +4,6 @@ components/esp_stdio/test_apps/stdio:
- if: CONFIG_NAME == "serial_jtag_only" and SOC_USB_SERIAL_JTAG_SUPPORTED != 1
- if: CONFIG_NAME == "serial_jtag_only_no_vfs" and SOC_USB_SERIAL_JTAG_SUPPORTED != 1
- if: CONFIG_NAME == "stdio_no_vfs" and SOC_USB_SERIAL_JTAG_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4" # TODO: IDF-14364
disable_test:
- if: CONFIG_NAME == "simple" and IDF_TARGET != "esp32"
components/esp_stdio/test_apps/stdio/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
components/esp_system/ld/esp32p4/memory.ld.in
+8 -1
View File
@@ -142,15 +142,22 @@ REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("text_seg_low", irom_seg);
#else
#if CONFIG_ESP32P4_SELECTS_REV_LESS_V3
REGION_ALIAS("text_seg_low", sram_low);
REGION_ALIAS("text_seg_high", sram_high);
#else
REGION_ALIAS("text_seg_low", sram_seg);
#endif //CONFIG_ESP32P4_SELECTS_REV_LESS_V3
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("rodata_seg_low", drom_seg);
#else
#if CONFIG_ESP32P4_SELECTS_REV_LESS_V3
REGION_ALIAS("rodata_seg_low", sram_low);
REGION_ALIAS("rodata_seg_high", sram_high);
#else
REGION_ALIAS("rodata_seg_low", sram_seg);
#endif //CONFIG_ESP32P4_SELECTS_REV_LESS_V3
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_SPIRAM_XIP_FROM_PSRAM
components/esp_system/test_apps/.build-test-rules.yml
+4
View File
@@ -8,6 +8,10 @@ components/esp_system/test_apps/esp_system_unity_tests:
disable:
- if: (CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1)
- if: (CONFIG_NAME == "psram_with_pd_top" and (SOC_SPIRAM_SUPPORTED != 1 or SOC_PM_SUPPORT_TOP_PD != 1))
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14419
components/esp_system/test_apps/linux_apis:
enable:
components/esp_system/test_apps/esp_system_unity_tests/pytest_esp_system_unity_tests.py
+2
View File
@@ -21,6 +21,7 @@ from pytest_embedded_idf.utils import soc_filtered_targets
],
indirect=['config', 'target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14419')
def test_esp_system(dut: Dut) -> None:
# esp32p4 32MB PSRAM initialize in startup takes more than 30 sec
dut.run_all_single_board_cases(timeout=60)
@@ -29,6 +30,7 @@ def test_esp_system(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('config', ['default'], indirect=['config'])
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14419')
def test_stack_smash_protection(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"stack smashing protection"')
components/esp_timer/test_apps/.build-test-rules.yml
+4
View File
@@ -4,3 +4,7 @@ components/esp_timer/test_apps:
disable:
- if: CONFIG_NAME == "dfs" and SOC_CLK_XTAL32K_SUPPORTED != 1
reason: The test requires the XTAL32K clock to measure the esp_timer timing accuracy
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14420
components/esp_timer/test_apps/pytest_esp_timer_ut.py
+2
View File
@@ -22,6 +22,7 @@ from pytest_embedded_idf.utils import idf_parametrize
],
indirect=['config', 'target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14420')
def test_esp_timer(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=120)
@@ -36,6 +37,7 @@ def test_esp_timer(dut: Dut) -> None:
indirect=True,
)
@idf_parametrize('target', ['esp32'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14420')
def test_esp_timer_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=120)
components/freertos/test_apps/.build-test-rules.yml
+5
View File
@@ -8,8 +8,13 @@ components/freertos/test_apps/build_tests/orig_inc_path:
enable:
- if: IDF_TARGET in ["esp32"]
reason: The feature only depends on the build system, nothing target-specific that needs to be tested
components/freertos/test_apps/freertos:
disable:
- if: CONFIG_NAME == "smp" and IDF_TARGET == "esp32p4"
temporary: true
reason: target(s) not supported yet
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14421
components/freertos/test_apps/freertos/pytest_freertos.py
+18 -3
View File
@@ -9,9 +9,21 @@ from pytest_embedded_idf.utils import idf_parametrize
@idf_parametrize(
'config,target,markers',
[
('default', 'supported_targets'),
('freertos_options', 'supported_targets'),
('tickless_idle', 'supported_targets'),
(
'default',
'supported_targets',
(pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421'),),
),
(
'freertos_options',
'supported_targets',
(pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421'),),
),
(
'tickless_idle',
'supported_targets',
(pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421'),),
),
('psram', 'esp32'),
('psram', 'esp32c5'),
('psram', 'esp32p4'),
@@ -52,6 +64,7 @@ def test_freertos_flash_auto_suspend(dut: Dut) -> None:
@pytest.mark.generic
@pytest.mark.parametrize('config', ['freertos_options'], indirect=True)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421')
def test_task_notify_too_high_index_fails(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests.')
dut.write('"Notify too high index fails"')
@@ -63,6 +76,7 @@ def test_task_notify_too_high_index_fails(dut: Dut) -> None:
@pytest.mark.generic
@pytest.mark.parametrize('config', ['freertos_options'], indirect=True)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421')
def test_task_notify_wait_too_high_index_fails(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests.')
dut.write('"Notify Wait too high index fails"')
@@ -74,6 +88,7 @@ def test_task_notify_wait_too_high_index_fails(dut: Dut) -> None:
@pytest.mark.generic
@pytest.mark.parametrize('config', ['default'], indirect=True)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421')
def test_port_must_assert_in_isr(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests.')
dut.write('"port must assert if in ISR context"')
components/mbedtls/test_apps/.build-test-rules.yml
+3
View File
@@ -6,6 +6,9 @@ components/mbedtls/test_apps:
- if: CONFIG_NAME == "psram_all_ext" and SOC_SPIRAM_SUPPORTED != 1
- if: CONFIG_NAME == "ecdsa_sign" and SOC_ECDSA_SUPPORTED != 1
- if: CONFIG_NAME == "psram_all_ext_flash_enc" and SOC_SPIRAM_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14367
disable_test:
- if: CONFIG_NAME == "psram_all_ext_flash_enc" and IDF_TARGET not in ["esp32"]
reason: lack of runners
components/mbedtls/test_apps/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
components/pthread/test_apps/pthread_unity_tests/pytest_pthread_unity_tests.py
+1
View File
@@ -14,6 +14,7 @@ from pytest_embedded_idf.utils import idf_parametrize
indirect=True,
)
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14421')
def test_pthread(dut: Dut) -> None:
dut.run_all_single_board_cases(group='!thread-specific', timeout=300)
components/soc/esp32p4/register/hw_ver3/soc/lp_i2c_reg.h
+812 -812
View File
File diff suppressed because it is too large Load Diff
components/soc/esp32p4/register/hw_ver3/soc/lp_spi_struct.h
+9 -250
View File
@@ -813,245 +813,19 @@ typedef union {
} lp_spi_sleep_conf1_reg_t;
/** Group: LP SPI W0 REG */
/** Type of spi_w0 register
/** Group: LP SPI Wn REG */
/** Type of spi_wn register
* SPI CPU-controlled buffer0
*/
typedef union {
struct {
/** reg_buf0 : R/W/SS; bitpos: [31:0]; default: 0;
/** reg_buf : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf0:32;
uint32_t reg_buf:32;
};
uint32_t val;
} lp_spi_w0_reg_t;
/** Group: LP SPI W1 REG */
/** Type of spi_w1 register
* SPI CPU-controlled buffer1
*/
typedef union {
struct {
/** reg_buf1 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf1:32;
};
uint32_t val;
} lp_spi_w1_reg_t;
/** Group: LP SPI W2 REG */
/** Type of spi_w2 register
* SPI CPU-controlled buffer2
*/
typedef union {
struct {
/** reg_buf2 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf2:32;
};
uint32_t val;
} lp_spi_w2_reg_t;
/** Group: LP SPI W3 REG */
/** Type of spi_w3 register
* SPI CPU-controlled buffer3
*/
typedef union {
struct {
/** reg_buf3 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf3:32;
};
uint32_t val;
} lp_spi_w3_reg_t;
/** Group: LP SPI W4 REG */
/** Type of spi_w4 register
* SPI CPU-controlled buffer4
*/
typedef union {
struct {
/** reg_buf4 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf4:32;
};
uint32_t val;
} lp_spi_w4_reg_t;
/** Group: LP SPI W5 REG */
/** Type of spi_w5 register
* SPI CPU-controlled buffer5
*/
typedef union {
struct {
/** reg_buf5 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf5:32;
};
uint32_t val;
} lp_spi_w5_reg_t;
/** Group: LP SPI W6 REG */
/** Type of spi_w6 register
* SPI CPU-controlled buffer6
*/
typedef union {
struct {
/** reg_buf6 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf6:32;
};
uint32_t val;
} lp_spi_w6_reg_t;
/** Group: LP SPI W7 REG */
/** Type of spi_w7 register
* SPI CPU-controlled buffer7
*/
typedef union {
struct {
/** reg_buf7 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf7:32;
};
uint32_t val;
} lp_spi_w7_reg_t;
/** Group: LP SPI W8 REG */
/** Type of spi_w8 register
* SPI CPU-controlled buffer8
*/
typedef union {
struct {
/** reg_buf8 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf8:32;
};
uint32_t val;
} lp_spi_w8_reg_t;
/** Group: LP SPI W9 REG */
/** Type of spi_w9 register
* SPI CPU-controlled buffer9
*/
typedef union {
struct {
/** reg_buf9 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf9:32;
};
uint32_t val;
} lp_spi_w9_reg_t;
/** Group: LP SPI W10 REG */
/** Type of spi_w10 register
* SPI CPU-controlled buffer10
*/
typedef union {
struct {
/** reg_buf10 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf10:32;
};
uint32_t val;
} lp_spi_w10_reg_t;
/** Group: LP SPI W11 REG */
/** Type of spi_w11 register
* SPI CPU-controlled buffer11
*/
typedef union {
struct {
/** reg_buf11 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf11:32;
};
uint32_t val;
} lp_spi_w11_reg_t;
/** Group: LP SPI W12 REG */
/** Type of spi_w12 register
* SPI CPU-controlled buffer12
*/
typedef union {
struct {
/** reg_buf12 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf12:32;
};
uint32_t val;
} lp_spi_w12_reg_t;
/** Group: LP SPI W13 REG */
/** Type of spi_w13 register
* SPI CPU-controlled buffer13
*/
typedef union {
struct {
/** reg_buf13 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf13:32;
};
uint32_t val;
} lp_spi_w13_reg_t;
/** Group: LP SPI W14 REG */
/** Type of spi_w14 register
* SPI CPU-controlled buffer14
*/
typedef union {
struct {
/** reg_buf14 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf14:32;
};
uint32_t val;
} lp_spi_w14_reg_t;
/** Group: LP SPI W15 REG */
/** Type of spi_w15 register
* SPI CPU-controlled buffer15
*/
typedef union {
struct {
/** reg_buf15 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t reg_buf15:32;
};
uint32_t val;
} lp_spi_w15_reg_t;
} lp_spi_wn_reg_t;
/** Group: LP SPI SLAVE REG */
/** Type of spi_slave register
@@ -1238,22 +1012,7 @@ typedef struct {
volatile lp_spi_sleep_conf1_reg_t spi_sleep_conf1;
volatile lp_spi_dma_int_set_reg_t spi_dma_int_set;
uint32_t reserved_050[18];
volatile lp_spi_w0_reg_t spi_w0;
volatile lp_spi_w1_reg_t spi_w1;
volatile lp_spi_w2_reg_t spi_w2;
volatile lp_spi_w3_reg_t spi_w3;
volatile lp_spi_w4_reg_t spi_w4;
volatile lp_spi_w5_reg_t spi_w5;
volatile lp_spi_w6_reg_t spi_w6;
volatile lp_spi_w7_reg_t spi_w7;
volatile lp_spi_w8_reg_t spi_w8;
volatile lp_spi_w9_reg_t spi_w9;
volatile lp_spi_w10_reg_t spi_w10;
volatile lp_spi_w11_reg_t spi_w11;
volatile lp_spi_w12_reg_t spi_w12;
volatile lp_spi_w13_reg_t spi_w13;
volatile lp_spi_w14_reg_t spi_w14;
volatile lp_spi_w15_reg_t spi_w15;
volatile lp_spi_wn_reg_t data_buf[16];
uint32_t reserved_0d8[2];
volatile lp_spi_slave_reg_t spi_slave;
volatile lp_spi_slave1_reg_t spi_slave1;
@@ -1263,12 +1022,12 @@ typedef struct {
volatile lp_rnd_eco_cs_reg_t rnd_eco_cs;
volatile lp_rnd_eco_low_reg_t rnd_eco_low;
volatile lp_rnd_eco_high_reg_t rnd_eco_high;
} lp_dev_t;
} lp_spi_dev_t;
extern lp_dev_t LP_SPI;
extern lp_spi_dev_t LP_SPI;
#ifndef __cplusplus
_Static_assert(sizeof(lp_dev_t) == 0x100, "Invalid size of lp_dev_t structure");
_Static_assert(sizeof(lp_spi_dev_t) == 0x100, "Invalid size of lp_spi_dev_t structure");
#endif
#ifdef __cplusplus
components/soc/esp32p4/register/hw_ver3/soc/lp_timer_reg.h
+203 -203
View File
@@ -11,331 +11,331 @@
extern "C" {
#endif
/** RTC_TIMER_TAR0_LOW_REG register
/** LP_TIMER_TAR0_LOW_REG register
* need_des
*/
#define RTC_TIMER_TAR0_LOW_REG (DR_REG_RTC_TIMER_BASE + 0x0)
/** RTC_TIMER_MAIN_TIMER_TAR_LOW0 : R/W; bitpos: [31:0]; default: 0;
#define LP_TIMER_TAR0_LOW_REG (DR_REG_LP_TIMER_BASE + 0x0)
/** LP_TIMER_MAIN_TIMER_TAR_LOW0 : R/W; bitpos: [31:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_TAR_LOW0 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_LOW0_M (RTC_TIMER_MAIN_TIMER_TAR_LOW0_V << RTC_TIMER_MAIN_TIMER_TAR_LOW0_S)
#define RTC_TIMER_MAIN_TIMER_TAR_LOW0_V 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_LOW0_S 0
#define LP_TIMER_MAIN_TIMER_TAR_LOW0 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_TAR_LOW0_M (LP_TIMER_MAIN_TIMER_TAR_LOW0_V << LP_TIMER_MAIN_TIMER_TAR_LOW0_S)
#define LP_TIMER_MAIN_TIMER_TAR_LOW0_V 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_TAR_LOW0_S 0
/** RTC_TIMER_TAR0_HIGH_REG register
/** LP_TIMER_TAR0_HIGH_REG register
* need_des
*/
#define RTC_TIMER_TAR0_HIGH_REG (DR_REG_RTC_TIMER_BASE + 0x4)
/** RTC_TIMER_MAIN_TIMER_TAR_HIGH0 : R/W; bitpos: [15:0]; default: 0;
#define LP_TIMER_TAR0_HIGH_REG (DR_REG_LP_TIMER_BASE + 0x4)
/** LP_TIMER_MAIN_TIMER_TAR_HIGH0 : R/W; bitpos: [15:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH0 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH0_M (RTC_TIMER_MAIN_TIMER_TAR_HIGH0_V << RTC_TIMER_MAIN_TIMER_TAR_HIGH0_S)
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH0_V 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH0_S 0
/** RTC_TIMER_MAIN_TIMER_TAR_EN0 : WT; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_TAR_HIGH0 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_TAR_HIGH0_M (LP_TIMER_MAIN_TIMER_TAR_HIGH0_V << LP_TIMER_MAIN_TIMER_TAR_HIGH0_S)
#define LP_TIMER_MAIN_TIMER_TAR_HIGH0_V 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_TAR_HIGH0_S 0
/** LP_TIMER_MAIN_TIMER_TAR_EN0 : WT; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_TAR_EN0 (BIT(31))
#define RTC_TIMER_MAIN_TIMER_TAR_EN0_M (RTC_TIMER_MAIN_TIMER_TAR_EN0_V << RTC_TIMER_MAIN_TIMER_TAR_EN0_S)
#define RTC_TIMER_MAIN_TIMER_TAR_EN0_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_TAR_EN0_S 31
#define LP_TIMER_MAIN_TIMER_TAR_EN0 (BIT(31))
#define LP_TIMER_MAIN_TIMER_TAR_EN0_M (LP_TIMER_MAIN_TIMER_TAR_EN0_V << LP_TIMER_MAIN_TIMER_TAR_EN0_S)
#define LP_TIMER_MAIN_TIMER_TAR_EN0_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_TAR_EN0_S 31
/** RTC_TIMER_TAR1_LOW_REG register
/** LP_TIMER_TAR1_LOW_REG register
* need_des
*/
#define RTC_TIMER_TAR1_LOW_REG (DR_REG_RTC_TIMER_BASE + 0x8)
/** RTC_TIMER_MAIN_TIMER_TAR_LOW1 : R/W; bitpos: [31:0]; default: 0;
#define LP_TIMER_TAR1_LOW_REG (DR_REG_LP_TIMER_BASE + 0x8)
/** LP_TIMER_MAIN_TIMER_TAR_LOW1 : R/W; bitpos: [31:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_TAR_LOW1 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_LOW1_M (RTC_TIMER_MAIN_TIMER_TAR_LOW1_V << RTC_TIMER_MAIN_TIMER_TAR_LOW1_S)
#define RTC_TIMER_MAIN_TIMER_TAR_LOW1_V 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_LOW1_S 0
#define LP_TIMER_MAIN_TIMER_TAR_LOW1 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_TAR_LOW1_M (LP_TIMER_MAIN_TIMER_TAR_LOW1_V << LP_TIMER_MAIN_TIMER_TAR_LOW1_S)
#define LP_TIMER_MAIN_TIMER_TAR_LOW1_V 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_TAR_LOW1_S 0
/** RTC_TIMER_TAR1_HIGH_REG register
/** LP_TIMER_TAR1_HIGH_REG register
* need_des
*/
#define RTC_TIMER_TAR1_HIGH_REG (DR_REG_RTC_TIMER_BASE + 0xc)
/** RTC_TIMER_MAIN_TIMER_TAR_HIGH1 : R/W; bitpos: [15:0]; default: 0;
#define LP_TIMER_TAR1_HIGH_REG (DR_REG_LP_TIMER_BASE + 0xc)
/** LP_TIMER_MAIN_TIMER_TAR_HIGH1 : R/W; bitpos: [15:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH1 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH1_M (RTC_TIMER_MAIN_TIMER_TAR_HIGH1_V << RTC_TIMER_MAIN_TIMER_TAR_HIGH1_S)
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH1_V 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_TAR_HIGH1_S 0
/** RTC_TIMER_MAIN_TIMER_TAR_EN1 : WT; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_TAR_HIGH1 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_TAR_HIGH1_M (LP_TIMER_MAIN_TIMER_TAR_HIGH1_V << LP_TIMER_MAIN_TIMER_TAR_HIGH1_S)
#define LP_TIMER_MAIN_TIMER_TAR_HIGH1_V 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_TAR_HIGH1_S 0
/** LP_TIMER_MAIN_TIMER_TAR_EN1 : WT; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_TAR_EN1 (BIT(31))
#define RTC_TIMER_MAIN_TIMER_TAR_EN1_M (RTC_TIMER_MAIN_TIMER_TAR_EN1_V << RTC_TIMER_MAIN_TIMER_TAR_EN1_S)
#define RTC_TIMER_MAIN_TIMER_TAR_EN1_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_TAR_EN1_S 31
#define LP_TIMER_MAIN_TIMER_TAR_EN1 (BIT(31))
#define LP_TIMER_MAIN_TIMER_TAR_EN1_M (LP_TIMER_MAIN_TIMER_TAR_EN1_V << LP_TIMER_MAIN_TIMER_TAR_EN1_S)
#define LP_TIMER_MAIN_TIMER_TAR_EN1_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_TAR_EN1_S 31
/** RTC_TIMER_UPDATE_REG register
/** LP_TIMER_UPDATE_REG register
* need_des
*/
#define RTC_TIMER_UPDATE_REG (DR_REG_RTC_TIMER_BASE + 0x10)
/** RTC_TIMER_MAIN_TIMER_UPDATE : WT; bitpos: [28]; default: 0;
#define LP_TIMER_UPDATE_REG (DR_REG_LP_TIMER_BASE + 0x10)
/** LP_TIMER_MAIN_TIMER_UPDATE : WT; bitpos: [28]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_UPDATE (BIT(28))
#define RTC_TIMER_MAIN_TIMER_UPDATE_M (RTC_TIMER_MAIN_TIMER_UPDATE_V << RTC_TIMER_MAIN_TIMER_UPDATE_S)
#define RTC_TIMER_MAIN_TIMER_UPDATE_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_UPDATE_S 28
/** RTC_TIMER_MAIN_TIMER_XTAL_OFF : R/W; bitpos: [29]; default: 0;
#define LP_TIMER_MAIN_TIMER_UPDATE (BIT(28))
#define LP_TIMER_MAIN_TIMER_UPDATE_M (LP_TIMER_MAIN_TIMER_UPDATE_V << LP_TIMER_MAIN_TIMER_UPDATE_S)
#define LP_TIMER_MAIN_TIMER_UPDATE_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_UPDATE_S 28
/** LP_TIMER_MAIN_TIMER_XTAL_OFF : R/W; bitpos: [29]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_XTAL_OFF (BIT(29))
#define RTC_TIMER_MAIN_TIMER_XTAL_OFF_M (RTC_TIMER_MAIN_TIMER_XTAL_OFF_V << RTC_TIMER_MAIN_TIMER_XTAL_OFF_S)
#define RTC_TIMER_MAIN_TIMER_XTAL_OFF_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_XTAL_OFF_S 29
/** RTC_TIMER_MAIN_TIMER_SYS_STALL : R/W; bitpos: [30]; default: 0;
#define LP_TIMER_MAIN_TIMER_XTAL_OFF (BIT(29))
#define LP_TIMER_MAIN_TIMER_XTAL_OFF_M (LP_TIMER_MAIN_TIMER_XTAL_OFF_V << LP_TIMER_MAIN_TIMER_XTAL_OFF_S)
#define LP_TIMER_MAIN_TIMER_XTAL_OFF_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_XTAL_OFF_S 29
/** LP_TIMER_MAIN_TIMER_SYS_STALL : R/W; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_SYS_STALL (BIT(30))
#define RTC_TIMER_MAIN_TIMER_SYS_STALL_M (RTC_TIMER_MAIN_TIMER_SYS_STALL_V << RTC_TIMER_MAIN_TIMER_SYS_STALL_S)
#define RTC_TIMER_MAIN_TIMER_SYS_STALL_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_SYS_STALL_S 30
/** RTC_TIMER_MAIN_TIMER_SYS_RST : R/W; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_SYS_STALL (BIT(30))
#define LP_TIMER_MAIN_TIMER_SYS_STALL_M (LP_TIMER_MAIN_TIMER_SYS_STALL_V << LP_TIMER_MAIN_TIMER_SYS_STALL_S)
#define LP_TIMER_MAIN_TIMER_SYS_STALL_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_SYS_STALL_S 30
/** LP_TIMER_MAIN_TIMER_SYS_RST : R/W; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_SYS_RST (BIT(31))
#define RTC_TIMER_MAIN_TIMER_SYS_RST_M (RTC_TIMER_MAIN_TIMER_SYS_RST_V << RTC_TIMER_MAIN_TIMER_SYS_RST_S)
#define RTC_TIMER_MAIN_TIMER_SYS_RST_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_SYS_RST_S 31
#define LP_TIMER_MAIN_TIMER_SYS_RST (BIT(31))
#define LP_TIMER_MAIN_TIMER_SYS_RST_M (LP_TIMER_MAIN_TIMER_SYS_RST_V << LP_TIMER_MAIN_TIMER_SYS_RST_S)
#define LP_TIMER_MAIN_TIMER_SYS_RST_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_SYS_RST_S 31
/** RTC_TIMER_MAIN_BUF0_LOW_REG register
/** LP_TIMER_MAIN_BUF0_LOW_REG register
* need_des
*/
#define RTC_TIMER_MAIN_BUF0_LOW_REG (DR_REG_RTC_TIMER_BASE + 0x14)
/** RTC_TIMER_MAIN_TIMER_BUF0_LOW : RO; bitpos: [31:0]; default: 0;
#define LP_TIMER_MAIN_BUF0_LOW_REG (DR_REG_LP_TIMER_BASE + 0x14)
/** LP_TIMER_MAIN_TIMER_BUF0_LOW : RO; bitpos: [31:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_BUF0_LOW 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_BUF0_LOW_M (RTC_TIMER_MAIN_TIMER_BUF0_LOW_V << RTC_TIMER_MAIN_TIMER_BUF0_LOW_S)
#define RTC_TIMER_MAIN_TIMER_BUF0_LOW_V 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_BUF0_LOW_S 0
#define LP_TIMER_MAIN_TIMER_BUF0_LOW 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_BUF0_LOW_M (LP_TIMER_MAIN_TIMER_BUF0_LOW_V << LP_TIMER_MAIN_TIMER_BUF0_LOW_S)
#define LP_TIMER_MAIN_TIMER_BUF0_LOW_V 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_BUF0_LOW_S 0
/** RTC_TIMER_MAIN_BUF0_HIGH_REG register
/** LP_TIMER_MAIN_BUF0_HIGH_REG register
* need_des
*/
#define RTC_TIMER_MAIN_BUF0_HIGH_REG (DR_REG_RTC_TIMER_BASE + 0x18)
/** RTC_TIMER_MAIN_TIMER_BUF0_HIGH : RO; bitpos: [15:0]; default: 0;
#define LP_TIMER_MAIN_BUF0_HIGH_REG (DR_REG_LP_TIMER_BASE + 0x18)
/** LP_TIMER_MAIN_TIMER_BUF0_HIGH : RO; bitpos: [15:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_BUF0_HIGH 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_BUF0_HIGH_M (RTC_TIMER_MAIN_TIMER_BUF0_HIGH_V << RTC_TIMER_MAIN_TIMER_BUF0_HIGH_S)
#define RTC_TIMER_MAIN_TIMER_BUF0_HIGH_V 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_BUF0_HIGH_S 0
#define LP_TIMER_MAIN_TIMER_BUF0_HIGH 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_BUF0_HIGH_M (LP_TIMER_MAIN_TIMER_BUF0_HIGH_V << LP_TIMER_MAIN_TIMER_BUF0_HIGH_S)
#define LP_TIMER_MAIN_TIMER_BUF0_HIGH_V 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_BUF0_HIGH_S 0
/** RTC_TIMER_MAIN_BUF1_LOW_REG register
/** LP_TIMER_MAIN_BUF1_LOW_REG register
* need_des
*/
#define RTC_TIMER_MAIN_BUF1_LOW_REG (DR_REG_RTC_TIMER_BASE + 0x1c)
/** RTC_TIMER_MAIN_TIMER_BUF1_LOW : RO; bitpos: [31:0]; default: 0;
#define LP_TIMER_MAIN_BUF1_LOW_REG (DR_REG_LP_TIMER_BASE + 0x1c)
/** LP_TIMER_MAIN_TIMER_BUF1_LOW : RO; bitpos: [31:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_BUF1_LOW 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_BUF1_LOW_M (RTC_TIMER_MAIN_TIMER_BUF1_LOW_V << RTC_TIMER_MAIN_TIMER_BUF1_LOW_S)
#define RTC_TIMER_MAIN_TIMER_BUF1_LOW_V 0xFFFFFFFFU
#define RTC_TIMER_MAIN_TIMER_BUF1_LOW_S 0
#define LP_TIMER_MAIN_TIMER_BUF1_LOW 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_BUF1_LOW_M (LP_TIMER_MAIN_TIMER_BUF1_LOW_V << LP_TIMER_MAIN_TIMER_BUF1_LOW_S)
#define LP_TIMER_MAIN_TIMER_BUF1_LOW_V 0xFFFFFFFFU
#define LP_TIMER_MAIN_TIMER_BUF1_LOW_S 0
/** RTC_TIMER_MAIN_BUF1_HIGH_REG register
/** LP_TIMER_MAIN_BUF1_HIGH_REG register
* need_des
*/
#define RTC_TIMER_MAIN_BUF1_HIGH_REG (DR_REG_RTC_TIMER_BASE + 0x20)
/** RTC_TIMER_MAIN_TIMER_BUF1_HIGH : RO; bitpos: [15:0]; default: 0;
#define LP_TIMER_MAIN_BUF1_HIGH_REG (DR_REG_LP_TIMER_BASE + 0x20)
/** LP_TIMER_MAIN_TIMER_BUF1_HIGH : RO; bitpos: [15:0]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_BUF1_HIGH 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_BUF1_HIGH_M (RTC_TIMER_MAIN_TIMER_BUF1_HIGH_V << RTC_TIMER_MAIN_TIMER_BUF1_HIGH_S)
#define RTC_TIMER_MAIN_TIMER_BUF1_HIGH_V 0x0000FFFFU
#define RTC_TIMER_MAIN_TIMER_BUF1_HIGH_S 0
#define LP_TIMER_MAIN_TIMER_BUF1_HIGH 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_BUF1_HIGH_M (LP_TIMER_MAIN_TIMER_BUF1_HIGH_V << LP_TIMER_MAIN_TIMER_BUF1_HIGH_S)
#define LP_TIMER_MAIN_TIMER_BUF1_HIGH_V 0x0000FFFFU
#define LP_TIMER_MAIN_TIMER_BUF1_HIGH_S 0
/** RTC_TIMER_MAIN_OVERFLOW_REG register
/** LP_TIMER_MAIN_OVERFLOW_REG register
* need_des
*/
#define RTC_TIMER_MAIN_OVERFLOW_REG (DR_REG_RTC_TIMER_BASE + 0x24)
/** RTC_TIMER_MAIN_TIMER_ALARM_LOAD : WT; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_OVERFLOW_REG (DR_REG_LP_TIMER_BASE + 0x24)
/** LP_TIMER_MAIN_TIMER_ALARM_LOAD : WT; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_ALARM_LOAD (BIT(31))
#define RTC_TIMER_MAIN_TIMER_ALARM_LOAD_M (RTC_TIMER_MAIN_TIMER_ALARM_LOAD_V << RTC_TIMER_MAIN_TIMER_ALARM_LOAD_S)
#define RTC_TIMER_MAIN_TIMER_ALARM_LOAD_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_ALARM_LOAD_S 31
#define LP_TIMER_MAIN_TIMER_ALARM_LOAD (BIT(31))
#define LP_TIMER_MAIN_TIMER_ALARM_LOAD_M (LP_TIMER_MAIN_TIMER_ALARM_LOAD_V << LP_TIMER_MAIN_TIMER_ALARM_LOAD_S)
#define LP_TIMER_MAIN_TIMER_ALARM_LOAD_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_ALARM_LOAD_S 31
/** RTC_TIMER_INT_RAW_REG register
/** LP_TIMER_INT_RAW_REG register
* need_des
*/
#define RTC_TIMER_INT_RAW_REG (DR_REG_RTC_TIMER_BASE + 0x28)
/** RTC_TIMER_OVERFLOW_RAW : R/WTC/SS; bitpos: [30]; default: 0;
#define LP_TIMER_INT_RAW_REG (DR_REG_LP_TIMER_BASE + 0x28)
/** LP_TIMER_OVERFLOW_RAW : R/WTC/SS; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_OVERFLOW_RAW (BIT(30))
#define RTC_TIMER_OVERFLOW_RAW_M (RTC_TIMER_OVERFLOW_RAW_V << RTC_TIMER_OVERFLOW_RAW_S)
#define RTC_TIMER_OVERFLOW_RAW_V 0x00000001U
#define RTC_TIMER_OVERFLOW_RAW_S 30
/** RTC_TIMER_SOC_WAKEUP_INT_RAW : R/WTC/SS; bitpos: [31]; default: 0;
#define LP_TIMER_OVERFLOW_RAW (BIT(30))
#define LP_TIMER_OVERFLOW_RAW_M (LP_TIMER_OVERFLOW_RAW_V << LP_TIMER_OVERFLOW_RAW_S)
#define LP_TIMER_OVERFLOW_RAW_V 0x00000001U
#define LP_TIMER_OVERFLOW_RAW_S 30
/** LP_TIMER_SOC_WAKEUP_INT_RAW : R/WTC/SS; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_SOC_WAKEUP_INT_RAW (BIT(31))
#define RTC_TIMER_SOC_WAKEUP_INT_RAW_M (RTC_TIMER_SOC_WAKEUP_INT_RAW_V << RTC_TIMER_SOC_WAKEUP_INT_RAW_S)
#define RTC_TIMER_SOC_WAKEUP_INT_RAW_V 0x00000001U
#define RTC_TIMER_SOC_WAKEUP_INT_RAW_S 31
#define LP_TIMER_SOC_WAKEUP_INT_RAW (BIT(31))
#define LP_TIMER_SOC_WAKEUP_INT_RAW_M (LP_TIMER_SOC_WAKEUP_INT_RAW_V << LP_TIMER_SOC_WAKEUP_INT_RAW_S)
#define LP_TIMER_SOC_WAKEUP_INT_RAW_V 0x00000001U
#define LP_TIMER_SOC_WAKEUP_INT_RAW_S 31
/** RTC_TIMER_INT_ST_REG register
/** LP_TIMER_INT_ST_REG register
* need_des
*/
#define RTC_TIMER_INT_ST_REG (DR_REG_RTC_TIMER_BASE + 0x2c)
/** RTC_TIMER_OVERFLOW_ST : RO; bitpos: [30]; default: 0;
#define LP_TIMER_INT_ST_REG (DR_REG_LP_TIMER_BASE + 0x2c)
/** LP_TIMER_OVERFLOW_ST : RO; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_OVERFLOW_ST (BIT(30))
#define RTC_TIMER_OVERFLOW_ST_M (RTC_TIMER_OVERFLOW_ST_V << RTC_TIMER_OVERFLOW_ST_S)
#define RTC_TIMER_OVERFLOW_ST_V 0x00000001U
#define RTC_TIMER_OVERFLOW_ST_S 30
/** RTC_TIMER_SOC_WAKEUP_INT_ST : RO; bitpos: [31]; default: 0;
#define LP_TIMER_OVERFLOW_ST (BIT(30))
#define LP_TIMER_OVERFLOW_ST_M (LP_TIMER_OVERFLOW_ST_V << LP_TIMER_OVERFLOW_ST_S)
#define LP_TIMER_OVERFLOW_ST_V 0x00000001U
#define LP_TIMER_OVERFLOW_ST_S 30
/** LP_TIMER_SOC_WAKEUP_INT_ST : RO; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_SOC_WAKEUP_INT_ST (BIT(31))
#define RTC_TIMER_SOC_WAKEUP_INT_ST_M (RTC_TIMER_SOC_WAKEUP_INT_ST_V << RTC_TIMER_SOC_WAKEUP_INT_ST_S)
#define RTC_TIMER_SOC_WAKEUP_INT_ST_V 0x00000001U
#define RTC_TIMER_SOC_WAKEUP_INT_ST_S 31
#define LP_TIMER_SOC_WAKEUP_INT_ST (BIT(31))
#define LP_TIMER_SOC_WAKEUP_INT_ST_M (LP_TIMER_SOC_WAKEUP_INT_ST_V << LP_TIMER_SOC_WAKEUP_INT_ST_S)
#define LP_TIMER_SOC_WAKEUP_INT_ST_V 0x00000001U
#define LP_TIMER_SOC_WAKEUP_INT_ST_S 31
/** RTC_TIMER_INT_ENA_REG register
/** LP_TIMER_INT_ENA_REG register
* need_des
*/
#define RTC_TIMER_INT_ENA_REG (DR_REG_RTC_TIMER_BASE + 0x30)
/** RTC_TIMER_OVERFLOW_ENA : R/W; bitpos: [30]; default: 0;
#define LP_TIMER_INT_ENA_REG (DR_REG_LP_TIMER_BASE + 0x30)
/** LP_TIMER_OVERFLOW_ENA : R/W; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_OVERFLOW_ENA (BIT(30))
#define RTC_TIMER_OVERFLOW_ENA_M (RTC_TIMER_OVERFLOW_ENA_V << RTC_TIMER_OVERFLOW_ENA_S)
#define RTC_TIMER_OVERFLOW_ENA_V 0x00000001U
#define RTC_TIMER_OVERFLOW_ENA_S 30
/** RTC_TIMER_SOC_WAKEUP_INT_ENA : R/W; bitpos: [31]; default: 0;
#define LP_TIMER_OVERFLOW_ENA (BIT(30))
#define LP_TIMER_OVERFLOW_ENA_M (LP_TIMER_OVERFLOW_ENA_V << LP_TIMER_OVERFLOW_ENA_S)
#define LP_TIMER_OVERFLOW_ENA_V 0x00000001U
#define LP_TIMER_OVERFLOW_ENA_S 30
/** LP_TIMER_SOC_WAKEUP_INT_ENA : R/W; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_SOC_WAKEUP_INT_ENA (BIT(31))
#define RTC_TIMER_SOC_WAKEUP_INT_ENA_M (RTC_TIMER_SOC_WAKEUP_INT_ENA_V << RTC_TIMER_SOC_WAKEUP_INT_ENA_S)
#define RTC_TIMER_SOC_WAKEUP_INT_ENA_V 0x00000001U
#define RTC_TIMER_SOC_WAKEUP_INT_ENA_S 31
#define LP_TIMER_SOC_WAKEUP_INT_ENA (BIT(31))
#define LP_TIMER_SOC_WAKEUP_INT_ENA_M (LP_TIMER_SOC_WAKEUP_INT_ENA_V << LP_TIMER_SOC_WAKEUP_INT_ENA_S)
#define LP_TIMER_SOC_WAKEUP_INT_ENA_V 0x00000001U
#define LP_TIMER_SOC_WAKEUP_INT_ENA_S 31
/** RTC_TIMER_INT_CLR_REG register
/** LP_TIMER_INT_CLR_REG register
* need_des
*/
#define RTC_TIMER_INT_CLR_REG (DR_REG_RTC_TIMER_BASE + 0x34)
/** RTC_TIMER_OVERFLOW_CLR : WT; bitpos: [30]; default: 0;
#define LP_TIMER_INT_CLR_REG (DR_REG_LP_TIMER_BASE + 0x34)
/** LP_TIMER_OVERFLOW_CLR : WT; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_OVERFLOW_CLR (BIT(30))
#define RTC_TIMER_OVERFLOW_CLR_M (RTC_TIMER_OVERFLOW_CLR_V << RTC_TIMER_OVERFLOW_CLR_S)
#define RTC_TIMER_OVERFLOW_CLR_V 0x00000001U
#define RTC_TIMER_OVERFLOW_CLR_S 30
/** RTC_TIMER_SOC_WAKEUP_INT_CLR : WT; bitpos: [31]; default: 0;
#define LP_TIMER_OVERFLOW_CLR (BIT(30))
#define LP_TIMER_OVERFLOW_CLR_M (LP_TIMER_OVERFLOW_CLR_V << LP_TIMER_OVERFLOW_CLR_S)
#define LP_TIMER_OVERFLOW_CLR_V 0x00000001U
#define LP_TIMER_OVERFLOW_CLR_S 30
/** LP_TIMER_SOC_WAKEUP_INT_CLR : WT; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_SOC_WAKEUP_INT_CLR (BIT(31))
#define RTC_TIMER_SOC_WAKEUP_INT_CLR_M (RTC_TIMER_SOC_WAKEUP_INT_CLR_V << RTC_TIMER_SOC_WAKEUP_INT_CLR_S)
#define RTC_TIMER_SOC_WAKEUP_INT_CLR_V 0x00000001U
#define RTC_TIMER_SOC_WAKEUP_INT_CLR_S 31
#define LP_TIMER_SOC_WAKEUP_INT_CLR (BIT(31))
#define LP_TIMER_SOC_WAKEUP_INT_CLR_M (LP_TIMER_SOC_WAKEUP_INT_CLR_V << LP_TIMER_SOC_WAKEUP_INT_CLR_S)
#define LP_TIMER_SOC_WAKEUP_INT_CLR_V 0x00000001U
#define LP_TIMER_SOC_WAKEUP_INT_CLR_S 31
/** RTC_TIMER_LP_INT_RAW_REG register
/** LP_TIMER_LP_INT_RAW_REG register
* need_des
*/
#define RTC_TIMER_LP_INT_RAW_REG (DR_REG_RTC_TIMER_BASE + 0x38)
/** RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW : R/WTC/SS; bitpos: [30]; default: 0;
#define LP_TIMER_LP_INT_RAW_REG (DR_REG_LP_TIMER_BASE + 0x38)
/** LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW : R/WTC/SS; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW (BIT(30))
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_M (RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_V << RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_S)
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_S 30
/** RTC_TIMER_MAIN_TIMER_LP_INT_RAW : R/WTC/SS; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW (BIT(30))
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_M (LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_V << LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_S)
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_RAW_S 30
/** LP_TIMER_MAIN_TIMER_LP_INT_RAW : R/WTC/SS; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_LP_INT_RAW (BIT(31))
#define RTC_TIMER_MAIN_TIMER_LP_INT_RAW_M (RTC_TIMER_MAIN_TIMER_LP_INT_RAW_V << RTC_TIMER_MAIN_TIMER_LP_INT_RAW_S)
#define RTC_TIMER_MAIN_TIMER_LP_INT_RAW_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_LP_INT_RAW_S 31
#define LP_TIMER_MAIN_TIMER_LP_INT_RAW (BIT(31))
#define LP_TIMER_MAIN_TIMER_LP_INT_RAW_M (LP_TIMER_MAIN_TIMER_LP_INT_RAW_V << LP_TIMER_MAIN_TIMER_LP_INT_RAW_S)
#define LP_TIMER_MAIN_TIMER_LP_INT_RAW_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_LP_INT_RAW_S 31
/** RTC_TIMER_LP_INT_ST_REG register
/** LP_TIMER_LP_INT_ST_REG register
* need_des
*/
#define RTC_TIMER_LP_INT_ST_REG (DR_REG_RTC_TIMER_BASE + 0x3c)
/** RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST : RO; bitpos: [30]; default: 0;
#define LP_TIMER_LP_INT_ST_REG (DR_REG_LP_TIMER_BASE + 0x3c)
/** LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST : RO; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST (BIT(30))
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_M (RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_V << RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_S)
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_S 30
/** RTC_TIMER_MAIN_TIMER_LP_INT_ST : RO; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST (BIT(30))
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_M (LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_V << LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_S)
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ST_S 30
/** LP_TIMER_MAIN_TIMER_LP_INT_ST : RO; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_LP_INT_ST (BIT(31))
#define RTC_TIMER_MAIN_TIMER_LP_INT_ST_M (RTC_TIMER_MAIN_TIMER_LP_INT_ST_V << RTC_TIMER_MAIN_TIMER_LP_INT_ST_S)
#define RTC_TIMER_MAIN_TIMER_LP_INT_ST_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_LP_INT_ST_S 31
#define LP_TIMER_MAIN_TIMER_LP_INT_ST (BIT(31))
#define LP_TIMER_MAIN_TIMER_LP_INT_ST_M (LP_TIMER_MAIN_TIMER_LP_INT_ST_V << LP_TIMER_MAIN_TIMER_LP_INT_ST_S)
#define LP_TIMER_MAIN_TIMER_LP_INT_ST_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_LP_INT_ST_S 31
/** RTC_TIMER_LP_INT_ENA_REG register
/** LP_TIMER_LP_INT_ENA_REG register
* need_des
*/
#define RTC_TIMER_LP_INT_ENA_REG (DR_REG_RTC_TIMER_BASE + 0x40)
/** RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA : R/W; bitpos: [30]; default: 0;
#define LP_TIMER_LP_INT_ENA_REG (DR_REG_LP_TIMER_BASE + 0x40)
/** LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA : R/W; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA (BIT(30))
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_M (RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_V << RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_S)
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_S 30
/** RTC_TIMER_MAIN_TIMER_LP_INT_ENA : R/W; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA (BIT(30))
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_M (LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_V << LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_S)
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_ENA_S 30
/** LP_TIMER_MAIN_TIMER_LP_INT_ENA : R/W; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_LP_INT_ENA (BIT(31))
#define RTC_TIMER_MAIN_TIMER_LP_INT_ENA_M (RTC_TIMER_MAIN_TIMER_LP_INT_ENA_V << RTC_TIMER_MAIN_TIMER_LP_INT_ENA_S)
#define RTC_TIMER_MAIN_TIMER_LP_INT_ENA_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_LP_INT_ENA_S 31
#define LP_TIMER_MAIN_TIMER_LP_INT_ENA (BIT(31))
#define LP_TIMER_MAIN_TIMER_LP_INT_ENA_M (LP_TIMER_MAIN_TIMER_LP_INT_ENA_V << LP_TIMER_MAIN_TIMER_LP_INT_ENA_S)
#define LP_TIMER_MAIN_TIMER_LP_INT_ENA_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_LP_INT_ENA_S 31
/** RTC_TIMER_LP_INT_CLR_REG register
/** LP_TIMER_LP_INT_CLR_REG register
* need_des
*/
#define RTC_TIMER_LP_INT_CLR_REG (DR_REG_RTC_TIMER_BASE + 0x44)
/** RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR : WT; bitpos: [30]; default: 0;
#define LP_TIMER_LP_INT_CLR_REG (DR_REG_LP_TIMER_BASE + 0x44)
/** LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR : WT; bitpos: [30]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR (BIT(30))
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_M (RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_V << RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_S)
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_S 30
/** RTC_TIMER_MAIN_TIMER_LP_INT_CLR : WT; bitpos: [31]; default: 0;
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR (BIT(30))
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_M (LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_V << LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_S)
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_OVERFLOW_LP_INT_CLR_S 30
/** LP_TIMER_MAIN_TIMER_LP_INT_CLR : WT; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_MAIN_TIMER_LP_INT_CLR (BIT(31))
#define RTC_TIMER_MAIN_TIMER_LP_INT_CLR_M (RTC_TIMER_MAIN_TIMER_LP_INT_CLR_V << RTC_TIMER_MAIN_TIMER_LP_INT_CLR_S)
#define RTC_TIMER_MAIN_TIMER_LP_INT_CLR_V 0x00000001U
#define RTC_TIMER_MAIN_TIMER_LP_INT_CLR_S 31
#define LP_TIMER_MAIN_TIMER_LP_INT_CLR (BIT(31))
#define LP_TIMER_MAIN_TIMER_LP_INT_CLR_M (LP_TIMER_MAIN_TIMER_LP_INT_CLR_V << LP_TIMER_MAIN_TIMER_LP_INT_CLR_S)
#define LP_TIMER_MAIN_TIMER_LP_INT_CLR_V 0x00000001U
#define LP_TIMER_MAIN_TIMER_LP_INT_CLR_S 31
/** RTC_TIMER_DATE_REG register
/** LP_TIMER_DATE_REG register
* need_des
*/
#define RTC_TIMER_DATE_REG (DR_REG_RTC_TIMER_BASE + 0x3fc)
/** RTC_TIMER_DATE : R/W; bitpos: [30:0]; default: 34672976;
#define LP_TIMER_DATE_REG (DR_REG_LP_TIMER_BASE + 0x3fc)
/** LP_TIMER_DATE : R/W; bitpos: [30:0]; default: 34672976;
* need_des
*/
#define RTC_TIMER_DATE 0x7FFFFFFFU
#define RTC_TIMER_DATE_M (RTC_TIMER_DATE_V << RTC_TIMER_DATE_S)
#define RTC_TIMER_DATE_V 0x7FFFFFFFU
#define RTC_TIMER_DATE_S 0
/** RTC_TIMER_CLK_EN : R/W; bitpos: [31]; default: 0;
#define LP_TIMER_DATE 0x7FFFFFFFU
#define LP_TIMER_DATE_M (LP_TIMER_DATE_V << LP_TIMER_DATE_S)
#define LP_TIMER_DATE_V 0x7FFFFFFFU
#define LP_TIMER_DATE_S 0
/** LP_TIMER_CLK_EN : R/W; bitpos: [31]; default: 0;
* need_des
*/
#define RTC_TIMER_CLK_EN (BIT(31))
#define RTC_TIMER_CLK_EN_M (RTC_TIMER_CLK_EN_V << RTC_TIMER_CLK_EN_S)
#define RTC_TIMER_CLK_EN_V 0x00000001U
#define RTC_TIMER_CLK_EN_S 31
#define LP_TIMER_CLK_EN (BIT(31))
#define LP_TIMER_CLK_EN_M (LP_TIMER_CLK_EN_V << LP_TIMER_CLK_EN_S)
#define LP_TIMER_CLK_EN_V 0x00000001U
#define LP_TIMER_CLK_EN_S 31
#ifdef __cplusplus
}
components/soc/esp32p4/register/hw_ver3/soc/pmu_struct.h
+1
View File
@@ -5,6 +5,7 @@
*/
#pragma once
#include <stddef.h>
#include <stdint.h>
#include "pmu_reg.h"
#ifdef __cplusplus
components/soc/esp32p4/register/hw_ver3/soc/usb_serial_jtag_reg.h
+796 -796
View File
File diff suppressed because it is too large Load Diff
components/ulp/test_apps/.build-test-rules.yml
+7
View File
@@ -5,10 +5,17 @@ components/ulp/test_apps/lp_core/lp_core_basic_tests:
- if: SOC_LP_CORE_SUPPORTED != 1
- if: CONFIG_NAME == "xtal" and SOC_CLK_LP_FAST_SUPPORT_XTAL != 1
- if: CONFIG_NAME == "lp_vad" and SOC_LP_VAD_SUPPORTED != 1
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14368
components/ulp/test_apps/lp_core/lp_core_hp_uart:
disable:
- if: SOC_LP_CORE_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14422
components/ulp/test_apps/ulp_fsm:
enable:
components/ulp/test_apps/lp_core/lp_core_basic_tests/README.md
+2 -2
View File
@@ -1,3 +1,3 @@
| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | -------- |
| Supported Targets | ESP32-C5 | ESP32-C6 |
| ----------------- | -------- | -------- |
components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py
+4
View File
@@ -8,6 +8,7 @@ from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_hp_uart_print(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"lp-print can output to hp-uart"')
@@ -18,6 +19,7 @@ def test_lp_core_hp_uart_print(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_panic(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"LP-Core panic"')
@@ -29,6 +31,7 @@ def test_lp_core_panic(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', soc_filtered_targets('SOC_LP_CORE_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_shared_mem(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"LP-Core Shared-mem"')
@@ -47,6 +50,7 @@ def test_lp_core_shared_mem(dut: Dut) -> None:
@pytest.mark.generic
@idf_parametrize('target', ['esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14422')
def test_lp_core_lp_rom(dut: Dut) -> None:
dut.expect_exact('Press ENTER to see the list of tests')
dut.write('"LP-Core LP-ROM"')
examples/cxx/.build-test-rules.yml
+13
View File
@@ -0,0 +1,13 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
examples/cxx/exceptions:
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14402
examples/cxx/rtti:
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14402
examples/cxx/exceptions/pytest_examples_cxx_exceptions.py
+1
View File
@@ -7,6 +7,7 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14402')
def test_examples_cpp_exceptions(dut: IdfDut) -> None:
lines = [
'app_main starting',
examples/cxx/rtti/pytest_examples_cxx_rtti.py
+1
View File
@@ -7,6 +7,7 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize('target', ['supported_targets'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14402')
def test_cpp_rtti_example(dut: IdfDut) -> None:
dut.expect_exact('Type name of std::cout is: std::ostream')
dut.expect_exact('Type name of std::cin is: std::istream')
examples/ethernet/.build-test-rules.yml
+2 -3
View File
@@ -4,7 +4,7 @@ examples/ethernet/basic:
enable:
- if: INCLUDE_DEFAULT == 1
disable:
- if: IDF_TARGET not in ["esp32", "esp32p4"]
- if: IDF_TARGET not in ["esp32"] # TODO: IDF-14365
depends_components:
- esp_eth
- esp_netif
@@ -17,8 +17,7 @@ examples/ethernet/iperf:
- if: IDF_TARGET in ["esp32h21", "esp32h4"]
temporary: true
reason: not supported yet # TODO: [ESP32H21] IDF-11581 [ESP32H4] IDF-12360
disable_test:
- if: IDF_TARGET not in ["esp32", "esp32p4"]
- if: IDF_TARGET not in ["esp32"] # TODO: IDF-14365
temporary: true
reason: lack of runners
depends_components:
examples/ethernet/basic/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-P4 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 |
| ----------------- | ----- |
# Basic Ethernet Example
(See the README.md file in the upper level 'examples' directory for more information about examples.)
examples/ethernet/iperf/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 |
| ----------------- | ----- |
# Ethernet iperf Example
examples/peripherals/.build-test-rules.yml
+26 -2
View File
@@ -10,11 +10,19 @@
examples/peripherals/adc/continuous_read:
disable:
- if: SOC_ADC_DMA_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14357
<<: *adc_dependencies
examples/peripherals/adc/oneshot_read:
disable:
- if: SOC_ADC_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14357
<<: *adc_dependencies
examples/peripherals/analog_comparator:
@@ -523,24 +531,40 @@ examples/peripherals/touch_sensor/touch_sens_sleep:
examples/peripherals/twai/cybergear:
disable:
- if: SOC_TWAI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14393
depends_components:
- esp_driver_twai
examples/peripherals/twai/twai_error_recovery:
disable:
- if: SOC_TWAI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14393
depends_components:
- esp_driver_twai
examples/peripherals/twai/twai_network:
disable:
- if: SOC_TWAI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14393
depends_components:
- esp_driver_twai
examples/peripherals/twai/twai_utils:
disable:
- if: SOC_TWAI_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: p4 rev3 migration # TODO: IDF-14393
depends_components:
- esp_driver_twai
@@ -560,9 +584,9 @@ examples/peripherals/usb/device:
disable:
- if: SOC_USB_OTG_SUPPORTED != 1
disable_test:
- if: IDF_TARGET not in ["esp32s2", "esp32p4"]
- if: IDF_TARGET not in ["esp32s2"]
temporary: true
reason: lack of runners with usb_device tag
reason: lack of runners with usb_device tag # TODO: IDF-14369
depends_components:
- fatfs
depends_filepatterns:
examples/peripherals/adc/continuous_read/pytest_adc_continuous.py
+1
View File
@@ -11,6 +11,7 @@ from pytest_embedded_idf.utils import idf_parametrize
['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32c5', 'esp32p4', 'esp32c61'],
indirect=['target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14357')
def test_adc_continuous(dut: Dut) -> None:
res = dut.expect(r'TASK: ret is 0, ret_num is (\d+) bytes')
num = res.group(1).decode('utf8')
examples/peripherals/adc/oneshot_read/pytest_adc_oneshot.py
+1
View File
@@ -11,6 +11,7 @@ from pytest_embedded_idf.utils import idf_parametrize
['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32c5', 'esp32p4', 'esp32c61'],
indirect=['target'],
)
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14357')
def test_adc_oneshot(dut: Dut) -> None:
dut.expect(r'EXAMPLE: ADC1 Channel\[(\d+)\] Raw Data: (\d+)', timeout=5)
examples/peripherals/twai/twai_utils/pytest_twai_utils.py
+1
View File
@@ -646,6 +646,7 @@ def test_twai_range_filters(twai: TwaiTestHelper) -> None:
@pytest.mark.twai_std
@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='no runner')
@idf_parametrize('target', soc_filtered_targets('SOC_TWAI_SUPPORTED == 1'), indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14393')
def test_twai_external_communication(twai: TwaiTestHelper, can_manager: CanBusManager) -> None:
"""
Test bidirectional communication with external CAN interface (hardware level).
examples/peripherals/usb/device/tusb_composite_msc_serialdevice/pytest_usb_device_composite.py
+2 -1
View File
@@ -12,6 +12,7 @@ from serial.tools.list_ports import comports
@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='lack of runners with usb_device tag')
@pytest.mark.usb_device
@idf_parametrize('target', ['esp32s2', 'esp32s3', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14369')
def test_usb_composite_device_serial_example(dut: Dut) -> None:
dut.expect_exact('Hello World!')
dut.expect_exact('USB Composite initialization')
@@ -23,7 +24,7 @@ def test_usb_composite_device_serial_example(dut: Dut) -> None:
for port, _, hwid in ports:
if '303A:4001' in hwid:
with Serial(port) as s:
s.write('text\r\n'.encode()) # Write dummy text to COM port
s.write(b'text\r\n') # Write dummy text to COM port
dut.expect_exact('Data from channel 0:') # Check ESP log
dut.expect_exact('|text..|')
res = s.readline() # Check COM echo
examples/peripherals/usb/device/tusb_console/pytest_usb_device_console.py
+1
View File
@@ -12,6 +12,7 @@ from serial.tools.list_ports import comports
@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='lack of runners with usb_device tag')
@pytest.mark.usb_device
@idf_parametrize('target', ['esp32s2', 'esp32s3', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14369')
def test_usb_device_console_example(dut: Dut) -> None:
dut.expect_exact('USB initialization DONE')
dut.expect_exact('example: log -> UART')
examples/peripherals/usb/device/tusb_hid/pytest_usb_device_hid.py
+1
View File
@@ -8,6 +8,7 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='lack of runners with usb_device tag')
@pytest.mark.usb_device
@idf_parametrize('target', ['esp32s2', 'esp32s3', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14369')
def test_usb_device_hid_example(dut: Dut) -> None:
dut.expect_exact('USB initialization DONE')
dut.expect_exact('Sending Keyboard report')
examples/peripherals/usb/device/tusb_midi/pytest_usb_device_midi.py
+1
View File
@@ -8,6 +8,7 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='lack of runners with usb_device tag')
@pytest.mark.usb_device
@idf_parametrize('target', ['esp32s2', 'esp32s3', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14369')
def test_usb_device_midi_example(dut: Dut) -> None:
dut.expect_exact('USB initialization DONE')
dut.expect_exact('MIDI write task init')
examples/peripherals/usb/device/tusb_msc/pytest_usb_device_msc.py
+1
View File
@@ -8,6 +8,7 @@ from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='lack of runners with usb_device tag')
@pytest.mark.usb_device
@idf_parametrize('target', ['esp32s2', 'esp32s3', 'esp32p4'], indirect=['target'])
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='p4 rev3 migration # TODO: IDF-14369')
def test_usb_device_msc_example(dut: Dut) -> None:
dut.expect('Mount storage')
dut.expect('TinyUSB Driver installed')

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