feat(ledc): ESP32P4 ECO5 LEDC related updates

This commit is contained in:
Song Ruo Jing
2025-09-04 15:34:41 +08:00
parent a1f765b68f
commit 22dfacc18d
11 changed files with 1328 additions and 5497 deletions
+1 -1
View File
@@ -905,7 +905,7 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
/*set channel parameters*/
/* channel parameters decide how the waveform looks like in one period */
/* set channel duty and hpoint value, duty range is [0, (2**duty_res)], hpoint range is [0, (2**duty_res)-1] */
/* Note: On ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2 (rev < 1.2), ESP32P4, due to a hardware bug,
/* Note: On ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2 (rev < 1.2), ESP32P4 (rev < 3.0), due to a hardware bug,
* 100% duty cycle (i.e. 2**duty_res) is not reachable when the binded timer selects the maximum duty
* resolution. For example, the max duty resolution on ESP32C3 is 14-bit width, then set duty to (2**14)
* will mess up the duty calculation in hardware.
+3 -4
View File
@@ -283,7 +283,6 @@ static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_m
static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
{
// The target has no timer-specific clock source option
HAL_ASSERT(hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 0);
*clk_src = LEDC_SCLK;
}
@@ -403,7 +402,7 @@ static inline void ledc_ll_set_duty_int_part(ledc_dev_t *hw, ledc_mode_t speed_m
*/
static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *duty_val)
{
*duty_val = (hw->channel_group[speed_mode].channel[channel_num].duty_r.duty >> 4);
*duty_val = (hw->channel_group[speed_mode].channel[channel_num].duty_r.duty_r >> 4);
}
/**
@@ -444,7 +443,7 @@ static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t spee
*/
static inline void ledc_ll_set_range_number(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range_num)
{
hw->chn_gamma_conf[channel_num].ch0_gamma_entry_num = range_num;
hw->chn_gamma_conf[channel_num].gamma_entry_num = range_num;
}
/**
@@ -459,7 +458,7 @@ static inline void ledc_ll_set_range_number(ledc_dev_t *hw, ledc_mode_t speed_mo
*/
static inline void ledc_ll_get_range_number(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *range_num)
{
*range_num = hw->chn_gamma_conf[channel_num].ch0_gamma_entry_num;
*range_num = hw->chn_gamma_conf[channel_num].gamma_entry_num;
}
/**
@@ -26,7 +26,7 @@ PROVIDE ( LP2HP_PERI_PMS = 0x500A5800 );
PROVIDE ( DMA_PMS = 0x500A6000 );
PROVIDE ( AXI_PERF_MON = 0x500A8000 );
PROVIDE ( LEDC = 0x500D3000 );
PROVIDE ( LEDC_GAMMA_RAM = 0x500D3400 );
PROVIDE ( LEDC_GAMMA_RAM = 0x500D3400 );
PROVIDE ( TIMERG0 = 0x500C2000 );
PROVIDE ( TIMERG1 = 0x500C3000 );
PROVIDE ( SYSTIMER = 0x500E2000 );
@@ -106,10 +106,10 @@ typedef union {
*/
typedef union {
struct {
/** duty_ch0_r : RO; bitpos: [24:0]; default: 0;
/** duty_r : RO; bitpos: [24:0]; default: 0;
* Represents the current duty of output signal on channel n.
*/
uint32_t duty:25;
uint32_t duty_r:25;
uint32_t reserved_25:7;
};
uint32_t val;
@@ -577,20 +577,20 @@ typedef union {
*/
typedef union {
struct {
/** ch0_gamma_entry_num : R/W; bitpos: [4:0]; default: 0;
/** gamma_entry_num : R/W; bitpos: [4:0]; default: 0;
* Configures the number of duty cycle fading rages for LEDC chn.
*/
uint32_t ch0_gamma_entry_num:5;
/** ch0_gamma_pause : WT; bitpos: [5]; default: 0;
uint32_t gamma_entry_num:5;
/** gamma_pause : WT; bitpos: [5]; default: 0;
* Configures whether or not to pause duty cycle fading of LEDC chn.\\0: Invalid. No
* effect\\1: Pause
*/
uint32_t ch0_gamma_pause:1;
/** ch0_gamma_resume : WT; bitpos: [6]; default: 0;
uint32_t gamma_pause:1;
/** gamma_resume : WT; bitpos: [6]; default: 0;
* Configures whether or nor to resume duty cycle fading of LEDC chn.\\0: Invalid. No
* effect\\1: Resume
*/
uint32_t ch0_gamma_resume:1;
uint32_t gamma_resume:1;
uint32_t reserved_7:25;
};
uint32_t val;
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -298,6 +298,10 @@ The range of the duty cycle values passed to functions depends on selected ``dut
The hardware limitation above only applies to chip revision before v1.2.
.. only:: esp32p4
The hardware limitation above only applies to chip revision before v3.0.
Change PWM Duty Cycle Using Hardware
""""""""""""""""""""""""""""""""""""
@@ -298,6 +298,10 @@ LEDC 驱动提供了一个辅助函数 :cpp:func:`ledc_find_suitable_duty_resolu
以上硬件限制仅在芯片版本低于 v1.2 的 ESP32H2 上存在。
.. only:: esp32p4
以上硬件限制仅在芯片版本低于 v3.0 的 ESP32P4 上存在。
使用硬件改变 PWM 占空比
""""""""""""""""""""""""""""""""""""
@@ -19,7 +19,7 @@
#define LEDC_FREQUENCY (4000) // Frequency in Hertz. Set frequency at 4 kHz
/* Warning:
* For ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2 (rev < 1.2), ESP32P4 targets,
* For ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2 (rev < 1.2), ESP32P4 (rev < 3.0) targets,
* when LEDC_DUTY_RES selects the maximum duty resolution (i.e. value equal to SOC_LEDC_TIMER_BIT_WIDTH),
* 100% duty cycle is not reachable (duty cannot be set to (2 ** SOC_LEDC_TIMER_BIT_WIDTH)).
*/