mirror of
https://github.com/espressif/esp-idf.git
synced 2026-04-27 19:13:21 +00:00
refactor(uart): clean up uart soc_caps
This commit is contained in:
Song Ruo Jing
@@ -33,7 +33,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#ifdef __cplusplus
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extern "C" {
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@@ -32,7 +32,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#ifdef __cplusplus
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extern "C" {
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@@ -40,7 +40,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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@@ -40,7 +40,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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@@ -36,7 +36,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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@@ -35,7 +35,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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@@ -35,7 +35,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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@@ -32,7 +32,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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@@ -45,7 +45,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#ifdef __cplusplus
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extern "C" {
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@@ -32,7 +32,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#ifdef __cplusplus
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extern "C" {
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@@ -647,7 +647,7 @@ static SLEEP_FN_ATTR void suspend_uarts(void)
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}
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uart_ll_force_xoff(i);
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s_suspended_uarts_bmap |= BIT(i);
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#if SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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#ifdef UART_LL_FSM_TX_WAIT_SEND
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uint32_t uart_fsm = 0;
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do {
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uart_fsm = uart_ll_get_tx_fsm_status(i);
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0TXD_GPIO_NUM (1)
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#define U0RXD_GPIO_NUM (3)
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@@ -32,23 +30,23 @@
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/* The following defines are necessary for reconfiguring the UART
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* to use IOMUX, at runtime. */
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#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
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#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
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#define U0RTS_MUX_FUNC (FUNC_GPIO22_U0RTS)
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#define U0CTS_MUX_FUNC (FUNC_GPIO19_U0CTS)
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#define U0TXD_MUX_FUNC (0)
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#define U0RXD_MUX_FUNC (0)
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#define U0RTS_MUX_FUNC (3)
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#define U0CTS_MUX_FUNC (3)
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#define U0DTR_MUX_FUNC (-1)
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#define U0DSR_MUX_FUNC (-1)
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#define U1TXD_MUX_FUNC (FUNC_SD_DATA3_U1TXD)
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#define U1RXD_MUX_FUNC (FUNC_SD_DATA2_U1RXD)
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#define U1RTS_MUX_FUNC (FUNC_SD_CMD_U1RTS)
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#define U1CTS_MUX_FUNC (FUNC_SD_CLK_U1CTS)
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#define U1TXD_MUX_FUNC (4)
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#define U1RXD_MUX_FUNC (4)
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#define U1RTS_MUX_FUNC (4)
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#define U1CTS_MUX_FUNC (4)
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#define U1DTR_MUX_FUNC (-1)
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#define U1DSR_MUX_FUNC (-1)
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#define U2TXD_MUX_FUNC (FUNC_GPIO17_U2TXD)
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#define U2RXD_MUX_FUNC (FUNC_GPIO16_U2RXD)
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#define U2RTS_MUX_FUNC (FUNC_SD_DATA0_U2RTS)
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#define U2CTS_MUX_FUNC (FUNC_SD_DATA1_U2CTS)
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#define U2TXD_MUX_FUNC (4)
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#define U2RXD_MUX_FUNC (4)
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#define U2RTS_MUX_FUNC (4)
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#define U2CTS_MUX_FUNC (4)
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#define U2DTR_MUX_FUNC (-1)
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#define U2DSR_MUX_FUNC (-1)
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@@ -663,10 +663,6 @@ config SOC_UART_SUPPORT_XTAL_CLK
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bool
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default y
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE
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bool
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default y
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@@ -298,9 +298,6 @@
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#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
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#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
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/*-------------------------- COEXISTENCE CAPS -------------------------------*/
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0RXD_GPIO_NUM 19
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#define U0TXD_GPIO_NUM 20
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@@ -25,8 +23,8 @@
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/* The following defines are necessary for reconfiguring the UART
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* to use IOMUX, at runtime. */
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#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
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#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
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#define U0TXD_MUX_FUNC (0)
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#define U0RXD_MUX_FUNC (0)
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/* No func for the following pins, they shall not be used */
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#define U0RTS_MUX_FUNC (-1)
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#define U0CTS_MUX_FUNC (-1)
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@@ -887,10 +887,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
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bool
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default y
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE
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bool
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default y
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@@ -387,9 +387,6 @@
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#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
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#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
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/*--------------------------- UHCI CAPS -------------------------------------*/
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0RXD_GPIO_NUM 20
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#define U0TXD_GPIO_NUM 21
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@@ -25,8 +23,8 @@
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/* The following defines are necessary for reconfiguring the UART
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* to use IOMUX, at runtime. */
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#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
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#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
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#define U0TXD_MUX_FUNC (0)
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#define U0RXD_MUX_FUNC (0)
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/* No func for the following pins, they shall not be used */
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#define U0RTS_MUX_FUNC (-1)
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#define U0CTS_MUX_FUNC (-1)
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@@ -1379,10 +1379,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
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bool
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default y
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
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int
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default 5
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@@ -557,9 +557,6 @@
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#define SOC_UART_HAS_LP_UART (1) /*!< Support LP UART */
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#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
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#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
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#define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE (1)
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0RXD_GPIO_NUM 12
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#define U0TXD_GPIO_NUM 11
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@@ -32,8 +30,8 @@
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/* The following defines are necessary for reconfiguring the UART
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* to use IOMUX, at runtime. */
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#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
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#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
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#define U0TXD_MUX_FUNC (0)
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#define U0RXD_MUX_FUNC (0)
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/* No func for the following pins, they shall not be used */
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#define U0RTS_MUX_FUNC (-1)
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#define U0CTS_MUX_FUNC (-1)
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@@ -1147,10 +1147,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
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bool
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default y
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
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int
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default 5
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@@ -472,9 +472,6 @@
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#define SOC_UART_HAS_LP_UART (1) /*!< Support LP UART */
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#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
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#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
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#define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE (1)
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0RXD_GPIO_NUM 17
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#define U0TXD_GPIO_NUM 16
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@@ -32,8 +30,8 @@
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/* The following defines are necessary for reconfiguring the UART
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* to use IOMUX, at runtime. */
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#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
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#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
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#define U0TXD_MUX_FUNC (0)
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#define U0RXD_MUX_FUNC (0)
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/* No func for the following pins, they shall not be used */
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#define U0RTS_MUX_FUNC (-1)
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#define U0CTS_MUX_FUNC (-1)
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@@ -1015,10 +1015,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
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bool
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default y
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
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int
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default 5
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@@ -419,9 +419,6 @@
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#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
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#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
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#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
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#define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE (1)
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0RXD_GPIO_NUM 10
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#define U0TXD_GPIO_NUM 11
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@@ -32,8 +30,8 @@
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/* The following defines are necessary for reconfiguring the UART
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* to use IOMUX, at runtime. */
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#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
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#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
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#define U0TXD_MUX_FUNC (0)
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#define U0RXD_MUX_FUNC (0)
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/* No func for the following pins, they shall not be used */
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#define U0RTS_MUX_FUNC (-1)
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#define U0CTS_MUX_FUNC (-1)
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@@ -1151,10 +1151,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
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bool
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default y
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_SUPPORT_SLEEP_RETENTION
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bool
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default y
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@@ -492,9 +492,6 @@
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#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
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#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
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#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
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@@ -6,8 +6,6 @@
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#pragma once
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#include "soc/io_mux_reg.h"
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/* Specify the GPIO pin number for each UART signal in the IOMUX */
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#define U0RXD_GPIO_NUM 23
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#define U0TXD_GPIO_NUM 24
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@@ -25,8 +23,8 @@
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|
||||
/* The following defines are necessary for reconfiguring the UART
|
||||
* to use IOMUX, at runtime. */
|
||||
#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
|
||||
#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
|
||||
#define U0TXD_MUX_FUNC (0)
|
||||
#define U0RXD_MUX_FUNC (0)
|
||||
/* No func for the following pins, they shall not be used */
|
||||
#define U0RTS_MUX_FUNC (-1)
|
||||
#define U0CTS_MUX_FUNC (-1)
|
||||
|
||||
@@ -855,10 +855,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_SUPPORT_SLEEP_RETENTION
|
||||
bool
|
||||
default y
|
||||
|
||||
@@ -468,9 +468,6 @@
|
||||
#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
|
||||
#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
|
||||
|
||||
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
|
||||
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
|
||||
|
||||
#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
|
||||
|
||||
#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
|
||||
|
||||
@@ -6,8 +6,6 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/io_mux_reg.h"
|
||||
|
||||
/* Specify the GPIO pin number for each UART signal in the IOMUX */
|
||||
#define U0RXD_GPIO_NUM 15
|
||||
#define U0TXD_GPIO_NUM 16
|
||||
@@ -25,8 +23,8 @@
|
||||
|
||||
/* The following defines are necessary for reconfiguring the UART
|
||||
* to use IOMUX, at runtime. */
|
||||
#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
|
||||
#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
|
||||
#define U0TXD_MUX_FUNC (0)
|
||||
#define U0RXD_MUX_FUNC (0)
|
||||
/* No func for the following pins, they shall not be used */
|
||||
#define U0RTS_MUX_FUNC (-1)
|
||||
#define U0CTS_MUX_FUNC (-1)
|
||||
|
||||
@@ -847,10 +847,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_SUPPORT_SLEEP_RETENTION
|
||||
bool
|
||||
default y
|
||||
|
||||
@@ -453,9 +453,6 @@
|
||||
#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
|
||||
#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
|
||||
|
||||
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
|
||||
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
|
||||
|
||||
#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
|
||||
|
||||
// #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
|
||||
|
||||
@@ -6,8 +6,6 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/io_mux_reg.h"
|
||||
|
||||
/* Specify the GPIO pin number for each UART signal in the IOMUX */
|
||||
#define U0RXD_GPIO_NUM 23
|
||||
#define U0TXD_GPIO_NUM 24
|
||||
@@ -25,8 +23,8 @@
|
||||
|
||||
/* The following defines are necessary for reconfiguring the UART
|
||||
* to use IOMUX, at runtime. */
|
||||
#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
|
||||
#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
|
||||
#define U0TXD_MUX_FUNC (0)
|
||||
#define U0RXD_MUX_FUNC (0)
|
||||
/* No func for the following pins, they shall not be used */
|
||||
#define U0RTS_MUX_FUNC (-1)
|
||||
#define U0CTS_MUX_FUNC (-1)
|
||||
|
||||
@@ -1715,10 +1715,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
|
||||
int
|
||||
default 5
|
||||
|
||||
@@ -655,9 +655,6 @@
|
||||
#define SOC_UART_HAS_LP_UART (1) /*!< Support LP UART */
|
||||
#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
|
||||
|
||||
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
|
||||
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
|
||||
|
||||
#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
|
||||
#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
|
||||
#define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE (1)
|
||||
|
||||
@@ -6,8 +6,6 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/io_mux_reg.h"
|
||||
|
||||
/* Specify the GPIO pin number for each UART signal in the IOMUX */
|
||||
#define U0RXD_GPIO_NUM 38
|
||||
#define U0TXD_GPIO_NUM 37
|
||||
@@ -53,18 +51,18 @@
|
||||
|
||||
/* The following defines are necessary for reconfiguring the UART
|
||||
* to use IOMUX, at runtime. */
|
||||
#define U0TXD_MUX_FUNC (FUNC_GPIO37_UART0_TXD_PAD)
|
||||
#define U0RXD_MUX_FUNC (FUNC_GPIO38_UART0_RXD_PAD)
|
||||
#define U0RTS_MUX_FUNC (FUNC_GPIO8_UART0_RTS_PAD)
|
||||
#define U0CTS_MUX_FUNC (FUNC_GPIO9_UART0_CTS_PAD)
|
||||
#define U0TXD_MUX_FUNC (0)
|
||||
#define U0RXD_MUX_FUNC (0)
|
||||
#define U0RTS_MUX_FUNC (2)
|
||||
#define U0CTS_MUX_FUNC (2)
|
||||
#define U0DTR_MUX_FUNC (-1)
|
||||
#define U0DSR_MUX_FUNC (-1)
|
||||
|
||||
/* Same goes for UART1 */
|
||||
#define U1TXD_MUX_FUNC (FUNC_GPIO10_UART1_TXD_PAD)
|
||||
#define U1RXD_MUX_FUNC (FUNC_GPIO11_UART1_RXD_PAD)
|
||||
#define U1RTS_MUX_FUNC (FUNC_GPIO12_UART1_RTS_PAD)
|
||||
#define U1CTS_MUX_FUNC (FUNC_GPIO13_UART1_CTS_PAD)
|
||||
#define U1TXD_MUX_FUNC (2)
|
||||
#define U1RXD_MUX_FUNC (2)
|
||||
#define U1RTS_MUX_FUNC (2)
|
||||
#define U1CTS_MUX_FUNC (2)
|
||||
#define U1DTR_MUX_FUNC (-1)
|
||||
#define U1DSR_MUX_FUNC (-1)
|
||||
|
||||
|
||||
@@ -6,8 +6,6 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/io_mux_reg.h"
|
||||
|
||||
/* Specify the GPIO pin number for each UART signal in the IOMUX */
|
||||
#define U0RXD_GPIO_NUM (44)
|
||||
#define U0TXD_GPIO_NUM (43)
|
||||
@@ -25,16 +23,16 @@
|
||||
|
||||
/* The following defines are necessary for reconfiguring the UART
|
||||
* to use IOMUX, at runtime. */
|
||||
#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
|
||||
#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
|
||||
#define U0RTS_MUX_FUNC (FUNC_XTAL_32K_P_U0RTS)
|
||||
#define U0CTS_MUX_FUNC (FUNC_XTAL_32K_N_U0CTS)
|
||||
#define U0TXD_MUX_FUNC (0)
|
||||
#define U0RXD_MUX_FUNC (0)
|
||||
#define U0RTS_MUX_FUNC (2)
|
||||
#define U0CTS_MUX_FUNC (2)
|
||||
#define U0DTR_MUX_FUNC (-1)
|
||||
#define U0DSR_MUX_FUNC (-1)
|
||||
|
||||
#define U1TXD_MUX_FUNC (FUNC_DAC_1_U1TXD)
|
||||
#define U1RXD_MUX_FUNC (FUNC_DAC_2_U1RXD)
|
||||
#define U1RTS_MUX_FUNC (FUNC_GPIO19_U1RTS)
|
||||
#define U1CTS_MUX_FUNC (FUNC_GPIO20_U1CTS)
|
||||
#define U1TXD_MUX_FUNC (2)
|
||||
#define U1RXD_MUX_FUNC (2)
|
||||
#define U1RTS_MUX_FUNC (2)
|
||||
#define U1CTS_MUX_FUNC (2)
|
||||
#define U1DTR_MUX_FUNC (-1)
|
||||
#define U1DSR_MUX_FUNC (-1)
|
||||
|
||||
@@ -863,10 +863,6 @@ config SOC_UART_BITRATE_MAX
|
||||
int
|
||||
default 5000000
|
||||
|
||||
config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_UART_SUPPORT_WAKEUP_INT
|
||||
bool
|
||||
default y
|
||||
|
||||
@@ -356,8 +356,6 @@
|
||||
#define SOC_UART_HP_NUM (3)
|
||||
#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */
|
||||
#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */
|
||||
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
|
||||
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
|
||||
#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
|
||||
#define SOC_UART_SUPPORT_APB_CLK (1) /*!< Support APB as the clock source */
|
||||
#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
|
||||
|
||||
@@ -6,8 +6,6 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/io_mux_reg.h"
|
||||
|
||||
/* Specify the GPIO pin number for each UART signal in the IOMUX */
|
||||
#define U0RXD_GPIO_NUM 44
|
||||
#define U0TXD_GPIO_NUM 43
|
||||
@@ -32,17 +30,17 @@
|
||||
|
||||
/* The following defines are necessary for reconfiguring the UART
|
||||
* to use IOMUX, at runtime. */
|
||||
#define U0TXD_MUX_FUNC (FUNC_U0TXD_U0TXD)
|
||||
#define U0RXD_MUX_FUNC (FUNC_U0RXD_U0RXD)
|
||||
#define U0RTS_MUX_FUNC (FUNC_XTAL_32K_P_U0RTS)
|
||||
#define U0CTS_MUX_FUNC (FUNC_XTAL_32K_N_U0CTS)
|
||||
#define U0TXD_MUX_FUNC (0)
|
||||
#define U0RXD_MUX_FUNC (0)
|
||||
#define U0RTS_MUX_FUNC (2)
|
||||
#define U0CTS_MUX_FUNC (2)
|
||||
#define U0DTR_MUX_FUNC (-1)
|
||||
#define U0DSR_MUX_FUNC (-1)
|
||||
|
||||
#define U1TXD_MUX_FUNC (FUNC_DAC_1_U1TXD)
|
||||
#define U1RXD_MUX_FUNC (FUNC_DAC_2_U1RXD)
|
||||
#define U1RTS_MUX_FUNC (FUNC_GPIO19_U1RTS)
|
||||
#define U1CTS_MUX_FUNC (FUNC_GPIO20_U1CTS)
|
||||
#define U1TXD_MUX_FUNC (2)
|
||||
#define U1RXD_MUX_FUNC (2)
|
||||
#define U1RTS_MUX_FUNC (2)
|
||||
#define U1CTS_MUX_FUNC (2)
|
||||
#define U1DTR_MUX_FUNC (-1)
|
||||
#define U1DSR_MUX_FUNC (-1)
|
||||
|
||||
|
||||
@@ -445,6 +445,6 @@ API Reference
|
||||
GPIO Lookup Macros
|
||||
^^^^^^^^^^^^^^^^^^
|
||||
|
||||
Some UART ports have dedicated IO_MUX pins to which they are connected directly. These can be useful if you need very high UART baud rates, which means you will have to use IO_MUX pins only. In other cases, any GPIO pin can be used for UART communication by routing the signals through the GPIO matrix. If the UART port has dedicated IO_MUX pins, :c:macro:`UART_NUM_x_TXD_DIRECT_GPIO_NUM` and :c:macro:`UART_NUM_x_RXD_DIRECT_GPIO_NUM` can be used to find the corresponding IO_MUX pin numbers.
|
||||
Some UART ports have dedicated IO_MUX pins to which they are connected directly. These can be useful if you need very high UART baud rates, which means you will have to use IO_MUX pins only. In other cases, any GPIO pin can be used for UART communication by routing the signals through the GPIO matrix. If the UART port has dedicated IO_MUX pins, :c:macro:`UxTXD_GPIO_NUM` and :c:macro:`UxRXD_GPIO_NUM` can be used to find the corresponding IO_MUX pin numbers.
|
||||
|
||||
.. include-build-file:: inc/uart_channel.inc
|
||||
.. include-build-file:: inc/uart_pins.inc
|
||||
|
||||
@@ -445,6 +445,6 @@ API 参考
|
||||
GPIO 查找宏指令
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
一些 UART 外设有供直接连接的专用 IO_MUX 管脚。这些管脚可用于需要极高 UART 波特率的场景，即仅可使用 IO_MUX 管脚。在其他情况下，任一 GPIO 管脚都可用于 UART 通信，只需将信号通过 GPIO 矩阵路由即可。当特定的 UART 外设有专用 IO_MUX 管脚时，:c:macro:`UART_NUM_x_TXD_DIRECT_GPIO_NUM` 和 :c:macro:`UART_NUM_x_RXD_DIRECT_GPIO_NUM` 可用于查找对应的 IO_MUX 管脚编号。
|
||||
一些 UART 外设有供直接连接的专用 IO_MUX 管脚。这些管脚可用于需要极高 UART 波特率的场景，即仅可使用 IO_MUX 管脚。在其他情况下，任一 GPIO 管脚都可用于 UART 通信，只需将信号通过 GPIO 矩阵路由即可。当特定的 UART 外设有专用 IO_MUX 管脚时，:c:macro:`UxTXD_GPIO_NUM` 和 :c:macro:`UxRXD_GPIO_NUM` 可用于查找对应的 IO_MUX 管脚编号。
|
||||
|
||||
.. include-build-file:: inc/uart_channel.inc
|
||||
.. include-build-file:: inc/uart_pins.inc
|
||||
|
||||
Reference in New Issue
Block a user