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bugfix(wifi): fix incomplete phy initialization due to absence of bb clocks at coexistence scenarios

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This commit is contained in:
liuning
2025-10-11 11:43:39 +08:00
committed by BOT
parent 2065d1e85a
commit 9c9f884f3a
23 changed files with 180 additions and 31 deletions
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components/esp_hw_support/include/esp_private/periph_ctrl.h
+14
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@@ -153,6 +153,20 @@ void wifi_module_enable(void);
*/
void wifi_module_disable(void);
/**
* @brief Enable phy module by un-gating related clock and de-asserting the reset signal.
*
* @note This function acquires clocks required during the PHY enable sequence.
*/
void phy_module_enable(void);
/**
* @brief Disable phy module by gating related clock and asserting the reset signal.
*
* @note This function releases clocks required during the PHY enable sequence.
*/
void phy_module_disable(void);
#undef __PERIPH_CTRL_DEPRECATE_ATTR
#ifdef __cplusplus
components/esp_hw_support/modem_clock.c
+14 -3
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@@ -312,8 +312,21 @@ void IRAM_ATTR modem_clock_module_mac_reset(shared_periph_module_t module)
#define MODEM_ETM_CLOCK_DEPS (BIT(MODEM_CLOCK_ETM))
#define MODEM_ADC_COMMON_FE_CLOCK_DEPS (BIT(MODEM_CLOCK_MODEM_ADC_COMMON_FE))
#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
#define PHY_CALIBRATION_CLOCK_DEPS (BIT(MODEM_CLOCK_WIFI_APB) | BIT(MODEM_CLOCK_WIFI_BB_44M))
#define PHY_CALIBRATION_WIFI_CLOCK_DEPS (BIT(MODEM_CLOCK_WIFI_MAC) | BIT(MODEM_CLOCK_WIFI_APB) | BIT(MODEM_CLOCK_WIFI_BB) | BIT(MODEM_CLOCK_WIFI_BB_44M))
#define PHY_CALIBRATION_BT_I154_CLOCK_DEPS (BIT(MODEM_CLOCK_WIFI_APB) | BIT(MODEM_CLOCK_WIFI_BB_44M) | BIT(MODEM_CLOCK_BT_I154_COMMON_BB))
#else
#define PHY_CALIBRATION_WIFI_CLOCK_DEPS (BIT(MODEM_CLOCK_WIFI_MAC) | BIT(MODEM_CLOCK_WIFI_BB))
#define PHY_CALIBRATION_BT_I154_CLOCK_DEPS (BIT(MODEM_CLOCK_BT_I154_COMMON_BB))
#endif
#ifndef SOC_WIFI_SUPPORTED
#undef PHY_CALIBRATION_WIFI_CLOCK_DEPS
#define PHY_CALIBRATION_WIFI_CLOCK_DEPS 0
#endif
#if !defined(SOC_BT_SUPPORTED) && !defined(SOC_IEEE802154_SUPPORTED)
#undef PHY_CALIBRATION_BT_I154_CLOCK_DEPS
#define PHY_CALIBRATION_BT_I154_CLOCK_DEPS 0
#endif
#define PHY_CALIBRATION_CLOCK_DEPS (PHY_CALIBRATION_WIFI_CLOCK_DEPS | PHY_CALIBRATION_BT_I154_CLOCK_DEPS)
static IRAM_ATTR uint32_t modem_clock_get_module_deps(shared_periph_module_t module)
{
@@ -331,9 +344,7 @@ static IRAM_ATTR uint32_t modem_clock_get_module_deps(shared_periph_module_t mod
#if SOC_BT_SUPPORTED
case PERIPH_BT_MODULE: deps = BLE_CLOCK_DEPS; break;
#endif
#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
case PERIPH_PHY_CALIBRATION_MODULE: deps = PHY_CALIBRATION_CLOCK_DEPS; break;
#endif
#if SOC_IEEE802154_SUPPORTED
case PERIPH_IEEE802154_MODULE: deps = IEEE802154_CLOCK_DEPS; break;
#endif
components/esp_hw_support/periph_ctrl.c
+67 -2
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@@ -131,7 +131,10 @@ void wifi_module_enable(void)
modem_clock_module_enable(PERIPH_WIFI_MODULE);
#else
esp_os_enter_critical_safe(&periph_spinlock);
periph_ll_wifi_module_enable_clk_clear_rst();
if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
periph_ll_wifi_module_enable_clk_clear_rst();
}
ref_counts[PERIPH_WIFI_MODULE]++;
esp_os_exit_critical_safe(&periph_spinlock);
#endif
}
@@ -142,8 +145,70 @@ void wifi_module_disable(void)
modem_clock_module_disable(PERIPH_WIFI_MODULE);
#else
esp_os_enter_critical_safe(&periph_spinlock);
periph_ll_wifi_module_disable_clk_set_rst();
ref_counts[PERIPH_WIFI_MODULE]--;
if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
periph_ll_wifi_module_disable_clk_set_rst();
}
esp_os_exit_critical_safe(&periph_spinlock);
#endif
}
#endif // CONFIG_ESP_WIFI_ENABLED
#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED || SOC_IEEE802154_SUPPORTED
// PERIPH_WIFI_BT_COMMON_MODULE is enabled outside
IRAM_ATTR void phy_module_enable(void)
{
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_PHY_CALIBRATION_MODULE);
#else
esp_os_enter_critical_safe(&periph_spinlock);
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
periph_ll_phy_calibration_module_enable_clk_clear_rst();
if (ref_counts[PERIPH_RNG_MODULE] == 0) {
periph_ll_enable_clk_clear_rst(PERIPH_RNG_MODULE);
}
ref_counts[PERIPH_RNG_MODULE]++;
#endif
#if SOC_WIFI_SUPPORTED
if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
periph_ll_wifi_module_enable_clk_clear_rst();
}
ref_counts[PERIPH_WIFI_MODULE]++;
#endif
#if SOC_BT_SUPPORTED
if (ref_counts[PERIPH_BT_MODULE] == 0) {
periph_ll_enable_clk_clear_rst(PERIPH_BT_MODULE);
}
ref_counts[PERIPH_BT_MODULE]++;
#endif
esp_os_exit_critical_safe(&periph_spinlock);
#endif
}
// PERIPH_WIFI_BT_COMMON_MODULE is disabled outside
IRAM_ATTR void phy_module_disable(void)
{
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_disable(PERIPH_PHY_CALIBRATION_MODULE);
#else
esp_os_enter_critical_safe(&periph_spinlock);
#if SOC_BT_SUPPORTED
ref_counts[PERIPH_BT_MODULE]--;
if (ref_counts[PERIPH_BT_MODULE] == 0) {
periph_ll_disable_clk_set_rst(PERIPH_BT_MODULE);
}
#endif
#if SOC_WIFI_SUPPORTED
ref_counts[PERIPH_WIFI_MODULE]--;
if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
periph_ll_wifi_module_disable_clk_set_rst();
}
#endif
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
// Do not disable PHY clock and RNG clock
ref_counts[PERIPH_RNG_MODULE]--;
#endif
esp_os_exit_critical_safe(&periph_spinlock);
#endif
}
#endif //#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED || SOC_IEEE802154_SUPPORTED
components/esp_phy/src/phy_init.c
+2 -22
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@@ -272,22 +272,6 @@ IRAM_ATTR void esp_phy_common_clock_disable(void)
wifi_bt_common_module_disable();
}
#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
IRAM_ATTR void esp_phy_calibration_clock_enable(esp_phy_modem_t modem)
{
if (modem == PHY_MODEM_BT || modem == PHY_MODEM_IEEE802154) {
modem_clock_module_enable(PERIPH_PHY_CALIBRATION_MODULE);
}
}
IRAM_ATTR void esp_phy_calibration_clock_disable(esp_phy_modem_t modem)
{
if (modem == PHY_MODEM_BT || modem == PHY_MODEM_IEEE802154) {
modem_clock_module_disable(PERIPH_PHY_CALIBRATION_MODULE);
}
}
#endif
#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
static inline void phy_digital_regs_store(void)
{
@@ -316,9 +300,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
phy_update_wifi_mac_time(false, s_phy_rf_en_ts);
#endif
esp_phy_common_clock_enable();
#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
esp_phy_calibration_clock_enable(modem);
#endif
phy_module_enable();
if (s_is_phy_calibrated == false) {
esp_phy_load_cal_and_init();
s_is_phy_calibrated = true;
@@ -360,9 +342,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
phy_ant_update();
phy_ant_clr_update_flag();
}
#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
esp_phy_calibration_clock_disable(modem);
#endif
phy_module_disable();
}
phy_set_modem_flag(modem);
#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_ESP_PHY_DISABLE_PLL_TRACK
components/esp_phy/src/phy_init_esp32hxx.c
+3
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@@ -9,6 +9,7 @@
#include "esp_phy_init.h"
#include "esp_private/phy.h"
#include "esp_timer.h"
#include "esp_private/periph_ctrl.h"
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
#include "esp_private/esp_modem_clock.h"
@@ -106,6 +107,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_PHY_MODULE);
#endif
phy_module_enable();
if (!s_phy_is_enabled) {
register_chipv7_phy(NULL, NULL, PHY_RF_CAL_FULL);
phy_version_print();
@@ -116,6 +118,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
#if !CONFIG_ESP_PHY_DISABLE_PLL_TRACK
phy_track_pll_init();
#endif
phy_module_disable();
}
phy_set_modem_flag(modem);
// Immediately track pll when phy enabled.
components/hal/esp32/include/hal/clk_gate_ll.h
+10
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@@ -158,6 +158,16 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
{
// No clock bit only for phy calibration on ESP32
}
static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
{
// No clock bit only for phy calibration on ESP32
}
#ifdef __cplusplus
}
#endif
components/hal/esp32c2/include/hal/clk_gate_ll.h
+12
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@@ -131,6 +131,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
#ifdef __cplusplus
}
#endif
components/hal/esp32c3/include/hal/clk_gate_ll.h
+12
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@@ -144,6 +144,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
#ifdef __cplusplus
}
#endif
components/hal/esp32s2/include/hal/clk_gate_ll.h
+12
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@@ -140,6 +140,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_PHY_EN_M);
DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_PHY_EN_M);
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}
#ifdef __cplusplus
}
#endif
components/hal/esp32s3/include/hal/clk_gate_ll.h
+12
View File
@@ -153,6 +153,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
#ifdef __cplusplus
}
#endif
components/soc/esp32/include/soc/periph_defs.h
+1
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@@ -25,6 +25,7 @@ typedef enum {
PERIPH_BT_MODULE,
PERIPH_WIFI_BT_COMMON_MODULE,
PERIPH_BT_BASEBAND_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
} shared_periph_module_t;
components/soc/esp32c2/include/soc/periph_defs.h
+1
View File
@@ -20,6 +20,7 @@ typedef enum {
PERIPH_BT_MODULE,
PERIPH_WIFI_BT_COMMON_MODULE,
PERIPH_SYSTIMER_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
} shared_periph_module_t;
components/soc/esp32c2/register/soc/syscon_reg.h
+2
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@@ -178,6 +178,8 @@ extern "C" {
#define SYSTEM_WIFI_CLK_BT_EN_S 0
/* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
/* Mask for clock bits used by phy calibration, bit 22, 29, 30, 31 */
#define SYSTEM_WIFI_CLK_PHY_EN_M 0xE0400000
/* Digital team to check */
//bluetooth baseband bit11
components/soc/esp32c3/include/soc/periph_defs.h
+1
View File
@@ -22,6 +22,7 @@ typedef enum {
PERIPH_BT_MODULE,
PERIPH_WIFI_BT_COMMON_MODULE,
PERIPH_SYSTIMER_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
} shared_periph_module_t;
components/soc/esp32c3/register/soc/syscon_reg.h
+2
View File
@@ -177,6 +177,8 @@ extern "C" {
#define SYSTEM_WIFI_CLK_BT_EN_S 0
/* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
/* Mask for clock bits used by phy calibration, bit 22 */
#define SYSTEM_WIFI_CLK_PHY_EN_M 0x400000
/* Digital team to check */
//bluetooth baseband bit11
components/soc/esp32c6/include/soc/periph_defs.h
+2 -1
View File
@@ -36,12 +36,13 @@ typedef enum {
PERIPH_ANA_I2C_MASTER_MODULE,
PERIPH_MODEM_ETM_MODULE,
PERIPH_MODEM_ADC_COMMON_FE_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
/* !!! Don't append soc modules here !!! */
} shared_periph_module_t;
#define PERIPH_MODEM_MODULE_MIN PERIPH_WIFI_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
#define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
#define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
components/soc/esp32h2/include/soc/periph_defs.h
+2 -1
View File
@@ -34,12 +34,13 @@ typedef enum {
PERIPH_ANA_I2C_MASTER_MODULE,
PERIPH_MODEM_ETM_MODULE,
PERIPH_MODEM_ADC_COMMON_FE_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
/* !!! Don't append soc modules here !!! */
} shared_periph_module_t;
#define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
#define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
#define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
components/soc/esp32h21/include/soc/periph_defs.h
+2 -1
View File
@@ -26,12 +26,13 @@ typedef enum {
PERIPH_ANA_I2C_MASTER_MODULE,
PERIPH_MODEM_ETM_MODULE,
PERIPH_MODEM_ADC_COMMON_FE_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
/* !!! Don't append soc modules here !!! */
} shared_periph_module_t;
#define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
#define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
#define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
components/soc/esp32h4/include/soc/periph_defs.h
+2 -1
View File
@@ -26,12 +26,13 @@ typedef enum {
PERIPH_ANA_I2C_MASTER_MODULE,
PERIPH_MODEM_ETM_MODULE,
PERIPH_MODEM_ADC_COMMON_FE_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
/* !!! Don't append soc modules here !!! */
} shared_periph_module_t;
#define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
#define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
#define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
components/soc/esp32s2/include/soc/periph_defs.h
+1
View File
@@ -22,6 +22,7 @@ typedef enum {
PERIPH_WIFI_MODULE,
PERIPH_WIFI_BT_COMMON_MODULE,
PERIPH_SYSTIMER_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
} shared_periph_module_t;
components/soc/esp32s2/register/soc/syscon_reg.h
+3
View File
@@ -445,6 +445,9 @@ extern "C" {
/* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M
/* Mask for clock bits used by phy calibration, bit 22 */
#define SYSTEM_WIFI_CLK_PHY_EN_M 0x400000
#define DPORT_WIFI_CLK_PHY_EN_M SYSTEM_WIFI_CLK_PHY_EN_M
/* Digital team to check */
//bluetooth baseband bit11
components/soc/esp32s3/include/soc/periph_defs.h
+1
View File
@@ -24,6 +24,7 @@ typedef enum {
PERIPH_BT_MODULE,
PERIPH_WIFI_BT_COMMON_MODULE,
PERIPH_SYSTIMER_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_MODULE_MAX
} shared_periph_module_t;
components/soc/esp32s3/register/soc/syscon_reg.h
+2
View File
@@ -178,6 +178,8 @@ extern "C" {
#define SYSTEM_WIFI_CLK_BT_EN_S 0
/* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
/* Mask for clock bits used by phy calibration, bit 22 */
#define SYSTEM_WIFI_CLK_PHY_EN_M 0x400000
//bluetooth baseband bit11
#define SYSTEM_BT_BASEBAND_EN BIT(11)