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Merge branch 'fix/xtensa_bss_end_alignment' into 'master'

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fix(panic): fix _bss_end alignment for esp32s2 and esp32s3

See merge request espressif/esp-idf!45469
This commit is contained in:
Alexey Lapshin
2026-01-30 10:57:33 +04:00
parent 9d155077af c0fcd5cbcd
commit c07c930edc
4 changed files with 4 additions and 4 deletions
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components/esp_system/ld/esp32s2/sections.ld.in
+1 -1
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@@ -333,7 +333,7 @@ SECTIONS
mutable[dram0_bss]
/* mutable libs end */
ALIGNED_SYMBOL(8, _bss_end)
ALIGNED_SYMBOL(16, _bss_end)
} > dram0_0_seg
.flash.appdesc : ALIGN(0x10)
components/esp_system/ld/esp32s3/sections.ld.in
+1 -1
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@@ -283,7 +283,7 @@ SECTIONS
mutable[dram0_bss]
/* mutable libs end */
ALIGNED_SYMBOL(8, _bss_end)
ALIGNED_SYMBOL(16, _bss_end)
} > dram0_0_seg
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
components/esp_system/port/soc/esp32s2/system_internal.c
+1 -1
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@@ -97,7 +97,7 @@ void esp_restart_noos(void)
// If stack_addr is from External Memory (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM is used)
// then need to switch SP to Internal Memory otherwise
// we will get the "Cache disabled but cached memory region accessed" error after Cache_Read_Disable.
uint32_t new_sp = ALIGN_DOWN(_bss_end, 16);
uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16);
SET_STACK(new_sp);
}
#endif
components/esp_system/port/soc/esp32s3/system_internal.c
+1 -1
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@@ -102,7 +102,7 @@ void esp_restart_noos(void)
// If stack_addr is from External Memory (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM is used)
// then need to switch SP to Internal Memory otherwise
// we will get the "Cache disabled but cached memory region accessed" error after Cache_Read_Disable.
uint32_t new_sp = ALIGN_DOWN(_bss_end, 16);
uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16);
SET_STACK(new_sp);
}
#endif