fix(uart): always add NOP workaround for UART FIFO read on esp32

This commit is contained in:
morris
2025-10-16 18:01:34 +08:00
parent ac6aeda1ec
commit e5da8951b3
6 changed files with 7 additions and 11 deletions
-2
View File
@@ -84,6 +84,4 @@ menu "ADC and ADC Calibration"
help
whether to enable the debug log message for ADC driver.
Note that this option only controls the ADC driver log, will not affect other drivers.
note: This cannot be used in the ADC legacy driver.
endmenu
+1 -1
View File
@@ -69,7 +69,7 @@ esp_err_t esp_cam_ctlr_get_frame_buffer(esp_cam_ctlr_handle_t handle, uint32_t f
ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null handle");
ESP_RETURN_ON_FALSE(handle->get_internal_buffer, ESP_ERR_NOT_SUPPORTED, TAG, "get buffer function not supported");
va_list args;
va_list args = {0};
va_start(args, fb0);
esp_err_t ret = handle->get_internal_buffer(handle, fb_num, fb0, args);
va_end(args);
-2
View File
@@ -16,8 +16,6 @@ menu "ESP-Driver:I2C Configurations"
whether to enable the debug log message for I2C driver.
Note that this option only controls the I2C driver log, will not affect other drivers.
note: This cannot be used in the I2C legacy driver.
config I2C_MASTER_ISR_HANDLER_IN_IRAM
bool "Place I2C master ISR handler into IRAM"
default y
@@ -26,6 +26,6 @@ endif()
# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(SRCS ${srcs}
REQUIRES unity esp_driver_gpio esp_driver_gptimer
REQUIRES esp_driver_uart test_utils efuse spi_flash esp_timer
PRIV_REQUIRES unity esp_driver_gpio esp_driver_gptimer esp_driver_uart
test_utils efuse spi_flash esp_timer esp_hal_wdt
WHOLE_ARCHIVE)
+4 -3
View File
@@ -338,11 +338,12 @@ FORCE_INLINE_ATTR void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_
{
//Get the UART APB fifo addr. Read fifo, we use APB address
uint32_t fifo_addr = (hw == &UART0) ? UART_FIFO_REG(0) : (hw == &UART1) ? UART_FIFO_REG(1) : UART_FIFO_REG(2);
for(uint32_t i = 0; i < rd_len; i++) {
for (uint32_t i = 0; i < rd_len; i++) {
buf[i] = READ_PERI_REG(fifo_addr);
#ifdef CONFIG_COMPILER_OPTIMIZATION_PERF
// workaround a hardware issue when CPU is @240MHz (especially when enable O2 optimization),
// always add a NOP instruction here to ensure the data is read correctly.
// UART FIFO read is not a performance critical part where 1 clock cycle matters.
__asm__ __volatile__("nop");
#endif
}
}
@@ -15,7 +15,6 @@ ignores:
# the following files should be refactored to remove Kconfig macros
- "components/hal/twai_hal_v1.c"
- "components/hal/esp32/include/hal/twai_ll.h"
- "components/hal/esp32/include/hal/uart_ll.h"
- "components/hal/include/hal/twai_types_deprecated.h"
rule:
any: