fix ci failed test case of Automatic light occurs when tasks are suspended
Closes IDFCI-7928, IDFCI-3963, and IDFCI-4189
See merge request espressif/esp-idf!44895
remove the configurable constraint for sleep memory usage optimization option
Closes IDFGH-16634 and IDF-13780
See merge request espressif/esp-idf!42882
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes
Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
use SPI1 and must work correctly at reduced CPU frequencies
Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases
This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
In cmakev2, a component can be evaluated within the context of another
component, so it's important to properly initialize each variable used
by the component.
Fixes: 0c4cf75c35 ("feat(esp32s31): Introduce esp32s31 hello world")
Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
Add new APIs to retrieve statistics about power management locks:
- esp_pm_get_lock_stats(): Get statistics for all PM lock types
- esp_pm_get_lock_instance_stats(): Get statistics for a single PM lock instance
Also update the test cases to verify the new functionality and
enable PM profiling in test configuration.
Closes https://github.com/espressif/esp-idf/issues/17770
Add a new test case to verify that USJ printing doesn't block CPU on chip
wake-up from light sleep. The test measures the average time per print
operation and ensures it's below 5000 microseconds.
The previous workaround does not work, the backup/restore should apply to RTC IO registers.
Also moved the workaround to sleep_gpio.c to avoid gpio hal using kconfig.