ESP32-S31 has a separate functional clock gate for the systimer
(reg_systimer_clk_en in HP_SYS_CLKRST) that defaults to off. Without
it, the counter snapshot never completes, hanging execution inside
esp_timer_init_nonos.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Previously it would return ESP_ERR_INVALID_STATE, which meant that if called from
user-code before the system tries to initialize the timer then esp-idf would
fail to boot.
This could happen if a user wanted to use esp-timer from a cpp constructor.
Closes https://github.com/espressif/esp-idf/issues/9679
This commit replaces the use of portNUM_PROCESSORS and configNUM_CORES
macros in all of ESP-IDF. These macros are needed to realize an SMP
scenario by fetching the number of active cores FreeRTOS is running on.
Instead, a new Kconfig option, CONFIG_FREERTOS_NUMBER_OF_CORES, has been
added as a proxy for the FreeRTOS config option, configNUMBER_OF_CORES.
This new commit is now used to realize an SMP scenario in various places
in ESP-IDF.
[Sudeep Mohanty: Added new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES]
Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
CONFIG_ESP_TIMER_ISR_AFFINITY can be equal to -1, whereas
ESP_SYSTEM_INIT_FN takes an uint16_t argument. To avoid overflow,
move the choice of init mask into source code and set the value
explicitly.
Similar to how the secondary init functions were already registered
via ESP_SYSTEM_INIT_FN, do the same for the core init functions.
This MR doesn't actually move the init functions into respective
components yet. This has to be carefully done in follow-up MRs.
Inadequate locking in the esp_timer component allowed corruption
of the s_timers linked list:
1. timer_armed(timer) returns false
2. another task arms the timer and adds it to s_timers
3. the list is locked
4. the timer is inserted into s_timers again
The last step results in a loop in the s_timers list, which causes
an infinite loop when iterated. This change always locks the
list before checking if the timer is already armed avoiding
the data race.
Related to ESP32-C6 chip only because this chip can power down the digital domain
during the light sleep. And after wakes up, systimer gets resumed,
and the alarm value < count value, so it leads the alarm fired immediately.
We get one unnecessary interrupt at light sleep exit time.
Other chips do not power down the digital domain related to systimer.
Timers, periodic or not, can now be restarted thanks to esp_timer_restart function.
This is done atomically, which can be used to feed a periodic timer, or simply change the period.
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
Marius Vikhammer
Chen Chen
Konstantin Kondrashov
Huelsenfrucht
morris
wuzhenghui
gaoxu
wanckl
Alexey Lapshin
fl0wl0w
laokaiyao
Ivan Grokhotkov
Armando
Alan Fisher
Jens Gutermuth
Cao Sen Miao
Omar Chebib