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morris
49 lines
2.1 KiB
Markdown
49 lines
2.1 KiB
Markdown
# ESP Hardware Abstraction Layer for DMA Peripheral(s)
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> [!NOTE]
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> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
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## Overview
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The `esp_hal_dma` component provides a **Hardware Abstraction Layer** for Direct Memory Access (DMA) controllers across all ESP-IDF supported targets. DMA allows peripherals to access memory directly without CPU intervention, significantly improving data transfer efficiency and reducing CPU load.
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## Architecture
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The DMA HAL is structured in two main sub-layers:
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1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control DMA peripherals (e.g., initialization, channel configuration, transfer start/stop).
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2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations.
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## Supported DMA Controllers
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This HAL supports various DMA controller types depending on the ESP chip:
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- **GDMA (General DMA)**: Available in multiple versions:
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- AHB GDMA (Version 1 & 2)
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- AXI GDMA
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- **DW GDMA**: DesignWare DMA controller
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- **DMA2D**: 2D DMA controller for efficient image processing operations
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- **CP DMA**: A dedicated DMA controller designed for highly efficient memory copy
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## Features
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- Channel allocation and management
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- Transfer direction control (TX/RX)
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- Trigger peripheral selection (M2M, SPI, I2S, etc.)
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- Priority configuration for channels
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- DMA descriptor handling
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- CRC calculation support (on supported chips)
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- ETM (Event Task Matrix) event handling
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## Usage
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The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_private/gdma.h`.
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Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed.
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## Dependencies
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- `soc`: Provides chip-specific register definitions
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- `hal`: Core hardware abstraction utilities and macros
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