Commit Graph

397 Commits

Author SHA1 Message Date
Chen Chen b9a308a47c Merge branch 'refactor/i2c_soc_caps_cleanup' into 'master'
refactor(i2c): cleanup I2C definitions in soc_caps.h

Closes IDF-13690

See merge request espressif/esp-idf!44962
2026-01-13 11:32:26 +08:00
Chen Chen 17d2041821 refactor(i2c): cleanup I2C definitions in soc_caps.h 2026-01-12 17:07:04 +08:00
hebinglin 2fdf2b992c revert(esp_hw_support): force top domain power up during sleep
This reverts commit 7912f9fafe.
2026-01-12 14:15:48 +08:00
zhiweijian ce72e90291 feat(ble/bluedroid): Add new bluedroid host examples 2026-01-08 12:17:26 +08:00
wuzhenghui 48ba430297 change(esp_hal_rtc_timer): unify lp_timer/rtc_timer naming to RTC_TIMER 2025-12-30 11:35:36 +08:00
Song Ruo Jing e0d3cc040d refactor(uart): clean up uart soc_caps 2025-12-25 14:52:11 +08:00
Song Ruo Jing 643b2508fa refactor(uart): remove soc/uart_channel.h 2025-12-25 14:42:43 +08:00
hebinglin 7cba4c8c4c feat(esp_hw_support): support clock output in esp32h4 mp 2025-12-24 10:50:34 +08:00
Michael (XIAO Xufeng) 32c31f68c8 Merge branch 'bugfix/esp32c5_encrypted_flash_write' into 'master'
fix(spi_flash): Add CPU frequency switching during flash encrypted write

See merge request espressif/esp-idf!43032
2025-12-17 21:48:05 +08:00
Chen Ji Chang df5f1e2b5e Merge branch 'fix/update_breakpoint_nums_on_c5_h4' into 'master'
fix(soc): update breakpoint nums on c5 and h4

See merge request espressif/esp-idf!44270
2025-12-17 20:31:51 +08:00
Xiao Xufeng 230ee88d99 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
2025-12-16 17:42:44 +08:00
Chen Jichang 6ff2ff2c6c fix(soc): update breakpoint nums on c5 and h4 2025-12-16 12:10:56 +08:00
morris 291554cd09 refactor(global): remove completed todos in the codebase 2025-12-15 22:40:15 +08:00
Wan Lei a633083633 Merge branch 'fix/spi_clean_soc_caps' into 'master'
refactor(driver_spi): clean spi soc caps

See merge request espressif/esp-idf!44083
2025-12-15 20:48:21 +08:00
C.S.M 61769cad4f Merge branch 'fix/remove_done_jiras' into 'master'
fix(spi_flash): Cleanup jira tickets

See merge request espressif/esp-idf!44183
2025-12-15 15:32:59 +08:00
Island 6781283061 Merge branch 'fix/add_soc_caps_for_pawr_feat' into 'master'
fix(ble): add soc caps feat for PAwR

Closes BLERP-2446 and BLERP-2447

See merge request espressif/esp-idf!44075
2025-12-15 11:22:55 +08:00
C.S.M 07519fac25 fix(spi_flash): Cleanup jira tickets 2025-12-12 17:53:01 +08:00
C.S.M e3eaee53e2 Merge branch 'ci/esp32s31_build_ena' into 'master'
ci(esp32s31): Add ci build test for esp32s31

See merge request espressif/esp-idf!44045
2025-12-12 14:59:42 +08:00
Wan Lei d6f02d5c8c Merge branch 'feat/split_esp_hal_spi_component' into 'master'
feat(driver_spi): split spi hal component

Closes IDF-14094

See merge request espressif/esp-idf!43890
2025-12-12 12:06:31 +08:00
wanckl 13e1ae57e1 refactor(driver_spi): clean spi soc caps 2025-12-12 11:29:42 +08:00
C.S.M f405e51784 ci(esp32s31): Add ci build test for esp32s31 2025-12-11 15:17:15 +08:00
wanckl 6449181ce0 feat(driver_spi): split spi hal component 2025-12-11 15:00:18 +08:00
cjin 19130df4f3 fix(ble): add soc caps config for pawr feat on ESP32C5 2025-12-09 16:27:00 +08:00
sibeibei 00f45acc4b fix: add mutex protection for software trigger RegDMA start to avoid data races 2025-12-09 14:55:08 +08:00
morris af02c173fb refactor(soc): remove soc_caps_full.h 2025-12-04 10:48:07 +08:00
morris ab4200e6f6 feat(twai): graduate the hal drivers into esp_hal_twai component 2025-12-01 22:32:54 +08:00
morris 580d9bca57 Merge branch 'refactor/esp_hal_gpio' into 'master'
refactor(gpio): split GPIO HAL into separate component

Closes IDF-14089

See merge request espressif/esp-idf!43215
2025-12-01 10:40:07 +08:00
Jaroslav Burian da18980ff0 change: Modify license of soc component
License of soc component is changed from Apache-2.0 to Apache-2.0 OR MIT
to be able to use it in esp-stub-lib
2025-11-28 10:32:05 +01:00
Song Ruo Jing 06970a5284 refactor(esp_hal_gpio): move some caps definitions to esp_hal_gpio 2025-11-26 15:35:27 +08:00
Chen Jichang 2cb84ecf95 feat(hal): graudate the RMT hal driver into a new component 2025-11-25 14:21:01 +08:00
morris bc064a353a refactor(hal_dma): move bitscrambler from hal component
because bitscrambler can't live without DMA, it's highly binded with the
GDMA peripheral.
2025-11-21 16:10:16 +08:00
laokaiyao 873d90218c refactor(parlio): refactor of the private parlio caps 2025-11-19 14:32:40 +08:00
laokaiyao bab5a7a8ed refactor(i2s): refactor of the private i2s caps 2025-11-18 16:13:14 +08:00
Jiang Jiang Jian 504c82ff6a Merge branch 'bugfix/update_wifi_fragment_doc' into 'master'
docs(wifi): update wifi fragment doc

Closes WIFI-7097

See merge request espressif/esp-idf!43044
2025-11-18 10:50:27 +08:00
Alexey Lapshin 8b1bb83af7 Merge branch 'feature/dynamic_flags_in_toolchain_cmake' into 'master'
feat(build): propagate compiler flags from files to toolchain.cmake

Closes IDF-11323

See merge request espressif/esp-idf!42966
2025-11-17 07:52:41 +04:00
Alexey Lapshin b0388ad4a5 feat(build): add COMPILER_ENABLE_RISCV_ZCMP option
Applicable for chips affected by interrupt issue:
  - ESP32C5
  - ESP32C61
  - ESP32H4

For all other chips that support the ZCMP extension without issues,
it will be enabled unconditionally.
2025-11-14 21:04:58 +07:00
morris 6bd8524115 feat(etm): support ETM driver on esp32h21 2025-11-14 10:40:40 +08:00
Chen Jichang 3daafd870f feat(hal): graudate the PCNT hal driver into a new component 2025-11-13 16:52:45 +08:00
Harshal Patil 0debe71b3d Merge branch 'feat/flash_enc_using_key_manager' into 'master'
Support Flash Encryption using Key Manager

Closes IDF-13462 and IDF-14278

See merge request espressif/esp-idf!41879
2025-11-13 07:55:15 +05:30
muhaidong 9cbd5c2804 docs(wifi): update wifi fragment doc 2025-11-12 19:15:28 +08:00
Song Ruo Jing a2901819b4 Merge branch 'feature/esp32p4_eco5_io_hold' into 'master'
feat(gpio): add IO hold support for Deep-sleep for ESP32-P4 ECO5

Closes IDF-12844 and IDF-13518

See merge request espressif/esp-idf!43147
2025-11-12 15:13:36 +08:00
Song Ruo Jing c17644a400 feat(gpio): add IO hold support for Deep-sleep for ESP32-P4 ECO5 2025-11-11 17:03:24 +08:00
harshal.patil 0c3c284819 feat(bootloader_support): Support FE XTS-AES-256 using Key Manager for ESP32-C5 2025-11-11 12:23:27 +05:30
harshal.patil 8abea3c537 feat(bootloader_support): Support Flash Encryption using Key Manager 2025-11-11 12:23:25 +05:30
harshal.patil a6de2c79ed fix(mbedtls/port): Align AES and SHA DMA buffers to 16 when SPIRAM encryption is enabled
- Targets that support GDMA and MSPI encryption module need data and addresses aligned to 16
2025-11-06 12:28:19 +05:30
morris 318867b3a2 Merge branch 'refactor/mcpwm_independent_hal' into 'master'
refactor(mcpwm): make mcpwm_hal independent & cleanup soc_caps

Closes IDF-13638 and IDF-14299

See merge request espressif/esp-idf!42886
2025-11-05 09:36:50 +08:00
Chen Chen d1612b952e refactor(mcpwm): make mcpwm_hal independent & cleanup soc_caps 2025-11-03 09:36:23 +08:00
hebinglin 6d51f0ea8b fix(esp_hw_support): resolved setting mie to disable interrupts failed in sleep flow 2025-10-31 14:37:25 +08:00
nilesh.kale e1f7a5e1fc feat: added test_cases for ECC P-384 curve operations 2025-10-30 10:42:40 +05:30
Song Ruo Jing cc3577e31a feat(ledc): add ETM support for LEDC peripheral
Closes https://github.com/espressif/esp-idf/issues/11855
2025-10-23 16:24:11 +08:00