Commit Graph

876 Commits

Author SHA1 Message Date
Chen Jichang 4709b6b474 change(soc): split SOC_NON_CACHEABLE_OFFSET macro to SRAM/PSRAM/FLASH 2026-01-14 16:04:28 +08:00
Ondrej Kosta a45f42de7c Merge branch 'feat/esp32p4_eco5_emac' into 'master'
Added PTP PPS Feature

Closes IDF-13513

See merge request espressif/esp-idf!44345
2026-01-13 16:24:09 +08:00
Ondrej Kosta f8b055bd11 feat(esp_eth): added PTP EMAC PPS0 support on ESP32P4v3
feat(esp_eth): added options to configure PTP module

feat(esp_eth): removed all PTP ioctl commands and created API
2026-01-12 17:13:25 +08:00
Chen Chen 17d2041821 refactor(i2c): cleanup I2C definitions in soc_caps.h 2026-01-12 17:07:04 +08:00
zlq 02f3974b6a fix(pvt): fix pvt retention bug,replace pvt_retention with pvt_init 2026-01-09 15:55:38 +08:00
Mahavir Jain 7675ce81df Merge branch 'feat/enable_pseudo_round_support_for_xts_aes_esp32p4_eco5' into 'master'
feat: added support for pseudo round xts aes in esp32p4 eco5

Closes IDF-13525

See merge request espressif/esp-idf!44376
2026-01-07 20:07:45 +05:30
nilesh.kale f42e35bb68 feat: added support for pseudo round xts aes in esp32p4 eco5 2026-01-07 13:20:55 +08:00
C.S.M 060283f782 refactor(i3c): Move i3c hal to seperate folder 2026-01-07 10:26:19 +08:00
C.S.M 23fbaad6e9 feat(i3c): Add soc and hal support for i3c master 2025-12-31 18:03:05 +08:00
wuzhenghui 48ba430297 change(esp_hal_rtc_timer): unify lp_timer/rtc_timer naming to RTC_TIMER 2025-12-30 11:35:36 +08:00
Chai Ji’e 729ff1181b Merge branch 'feat/p4eco6_ldo2dcdc_support' into 'master'
feat (p4eco6): open dcdc switch by software when dcdc stable

See merge request espressif/esp-idf!44492
2025-12-26 09:47:26 +08:00
Song Ruo Jing e0d3cc040d refactor(uart): clean up uart soc_caps 2025-12-25 14:52:11 +08:00
Song Ruo Jing 643b2508fa refactor(uart): remove soc/uart_channel.h 2025-12-25 14:42:43 +08:00
Song Ruo Jing 74aeb3f41f refactor(uart): split UART HAL into separate component 2025-12-25 14:41:28 +08:00
chaijie@espressif.com ac4781c6f2 feat (p4eco6): open dcdc switch by software when dcdc stable 2025-12-25 11:35:28 +08:00
Chen Jichang e1348d074c fix(gdma): fix set dma burst size failure on p4 v3.0 2025-12-22 20:16:06 +08:00
Kevin (Lao Kaiyao) 3665d0b0f6 Merge branch 'feature/graduate_tsens_hal_component' into 'master'
feat(tsens): graduate temperature sensor hal component

Closes IDF-14906

See merge request espressif/esp-idf!44121
2025-12-18 12:44:41 +08:00
Song Ruo Jing a3c63f362b Merge branch 'refactor/esp_hal_ledc' into 'master'
refactor(ledc): split ledc hal into a separate component

Closes IDF-14085

See merge request espressif/esp-idf!44204
2025-12-18 11:59:25 +08:00
Michael (XIAO Xufeng) 32c31f68c8 Merge branch 'bugfix/esp32c5_encrypted_flash_write' into 'master'
fix(spi_flash): Add CPU frequency switching during flash encrypted write

See merge request espressif/esp-idf!43032
2025-12-17 21:48:05 +08:00
laokaiyao 3cfd8d6906 feat(tsens): graduate temperature sensor hal component 2025-12-17 16:09:21 +08:00
Song Ruo Jing 67a738d1de refactor(ledc): split ledc hal into a separate component 2025-12-17 15:26:10 +08:00
armando a0e52a3a1d refactor(isp): use fourcc for isp color formats 2025-12-17 01:58:58 +00:00
Mahavir Jain 9adbef7374 Merge branch 'feat/enable_ecdsa_support_for_esp32p4_eco5' into 'master'
feat(esp32p4_eco5): enabled ECDSA peripheral support for ESP32P4 ECO5

Closes IDF-13522, IDF-13744, IDF-12235, and IDF-13523

See merge request espressif/esp-idf!43023
2025-12-16 17:30:45 +05:30
Xiao Xufeng 230ee88d99 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
2025-12-16 17:42:44 +08:00
morris 1f04dbb31b Merge branch 'refactor/remove_completed_todos' into 'master'
refactor(global): remove completed todos in the codebase

See merge request espressif/esp-idf!44188
2025-12-16 14:21:25 +08:00
nilesh.kale 2267558b15 feat: enabled ECDSA peripheral support for ESSP32-P4 2025-12-16 11:48:06 +05:30
Chen Chen 3cf86e260c refactor(esp_system): clear dependency on hal components 2025-12-15 22:56:09 +08:00
morris 291554cd09 refactor(global): remove completed todos in the codebase 2025-12-15 22:40:15 +08:00
Kevin (Lao Kaiyao) b33c9cd7ce Merge branch 'feature/support_touch_sensor_on_h4' into 'master'
feat(touch_sens): support touch sensor on H4

Closes IDF-13941

See merge request espressif/esp-idf!41511
2025-12-15 20:58:32 +08:00
Wan Lei a633083633 Merge branch 'fix/spi_clean_soc_caps' into 'master'
refactor(driver_spi): clean spi soc caps

See merge request espressif/esp-idf!44083
2025-12-15 20:48:21 +08:00
laokaiyao 1e54a82e42 feat(touch_sens): support touch sensor on esp32h4 2025-12-15 11:18:37 +08:00
Ondrej Kosta 05012bdf3d Merge branch 'fix/p4_fixed_mdc_config' into 'master'
fix(esp_eth): fixed ESP32P4 CSR clock range used to determine MDC

Closes IDFGH-16923

See merge request espressif/esp-idf!44063
2025-12-12 23:58:30 +08:00
C.S.M e3eaee53e2 Merge branch 'ci/esp32s31_build_ena' into 'master'
ci(esp32s31): Add ci build test for esp32s31

See merge request espressif/esp-idf!44045
2025-12-12 14:59:42 +08:00
Wan Lei d6f02d5c8c Merge branch 'feat/split_esp_hal_spi_component' into 'master'
feat(driver_spi): split spi hal component

Closes IDF-14094

See merge request espressif/esp-idf!43890
2025-12-12 12:06:31 +08:00
wanckl 13e1ae57e1 refactor(driver_spi): clean spi soc caps 2025-12-12 11:29:42 +08:00
Ondrej Kosta ae3fbe1ada fix(esp_eth): fixes EMAC MDC out of the range issue
Closes https://github.com/espressif/esp-idf/issues/17984
2025-12-11 17:30:30 +01:00
Aditya Patwardhan 44de3dab81 Merge branch 'feat/update_reg_files_for_aes_and_sha_p4_eco5' into 'master'
feat: updated reg files for aes and sha for ESP32P4 ECO5

Closes IDF-12237 and IDF-13437

See merge request espressif/esp-idf!43723
2025-12-11 13:41:54 +05:30
C.S.M f405e51784 ci(esp32s31): Add ci build test for esp32s31 2025-12-11 15:17:15 +08:00
wanckl 6449181ce0 feat(driver_spi): split spi hal component 2025-12-11 15:00:18 +08:00
armando b856201cc1 feat(hal):graudate the isp hal driver into a new component 2025-12-10 17:56:43 +08:00
nilesh.kale 6d5cf06505 feat: updated reg files for aes and sha for ESP32P4 ECO5 2025-12-09 17:31:32 +05:30
morris af02c173fb refactor(soc): remove soc_caps_full.h 2025-12-04 10:48:07 +08:00
laokaiyao e39c9781f3 feat(hal): graudate the adc/dac hal driver into a new component 2025-12-04 10:38:24 +08:00
laokaiyao 79d6e573e6 feat(hal): graudate the ana_cmpr hal driver into a new component 2025-12-04 10:34:57 +08:00
laokaiyao 5e249409ff feat(hal): graudate the touch sensor hal driver into a new component 2025-12-04 10:34:57 +08:00
Alexey Lapshin f6cd2fe970 Merge branch 'feature/update-toolchain-to-esp-15.2.0_20250929.4-6d3fdb7' into 'master'
Make Picolibc the default libc

See merge request espressif/esp-idf!43620
2025-12-04 01:14:01 +04:00
morris 487551888a Merge branch 'refactor/ppa_dma2d_fourcc' into 'master'
refactor(ppa): use fourcc for dma2d and ppa color formats

Closes IDF-14234

See merge request espressif/esp-idf!43435
2025-12-04 01:28:56 +08:00
Alexey Lapshin 31810ae993 feat(esp_libc): make picolibc default libc 2025-12-03 13:31:42 +07:00
morris ab4200e6f6 feat(twai): graduate the hal drivers into esp_hal_twai component 2025-12-01 22:32:54 +08:00
Song Ruo Jing fe8ace8bef refactor(ppa): use fourcc for dma2d and ppa color formats 2025-12-01 19:21:49 +08:00