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289 Commits

Author SHA1 Message Date
He Binglin 4f26d48e7b Merge branch 'feat/esp_idf_h4mp_hpuart_wakeup' into 'master' 
feat: support esp32h4mp hpuart wakeup

Closes PM-457

See merge request espressif/esp-idf!44436
 2026-01-15 15:05:28 +08:00
Chen Chen 17d2041821 refactor(i2c): cleanup I2C definitions in soc_caps.h 2026-01-12 17:07:04 +08:00
hebinglin e08dd5b1da change(soc): update pmu icg mapping in esp32h4mp 2026-01-12 10:40:55 +08:00
hebinglin f53a9a3a76 feat(esp_hw_support): support hp uart wakeup with 4 modes in esp32h4 2026-01-12 10:40:55 +08:00
hebinglin d447d5105e feat(esp_hw_support): support ICG control for peripherals in esp32h4 2026-01-12 10:40:55 +08:00
Zhang Wen Xu e54b8e7f23 Merge branch 'feat/split_154_hal_components' into 'master' 
feat(ieee802154): separated the 802.15.4 HAL codes from the HAL component

Closes IDF-15096

See merge request espressif/esp-idf!44855
 2026-01-09 08:49:26 +00:00
Jiang Jiang Jian 382dbc04ea Merge branch 'bugfix/fix_esp32_phy_init_bb_clock_issue' into 'master' 
bugfix(wifi): fix incomplete phy initialization due to absence of bb clocks at...

Closes ESPCS-1007 and ESPCS-997

See merge request espressif/esp-idf!42511
 2026-01-08 20:32:04 +08:00
hebinglin 5443411c78 change(esp_hw_support): update pmu param for esp32h4mp 2026-01-07 17:18:07 +08:00
zwx 47af508b7a feat(ieee802154): separated the 802.15.4 HAL codes from the HAL component 2026-01-07 16:41:47 +08:00
Song Ruo Jing 215c9993bf fix(clk): update H4 to use 64MHz clock for mspi 
And add pll clock ref count
 2026-01-04 14:07:01 +08:00
Chen Jichang 8702d5c986 feat(clk): support clk tree on h4mp 2026-01-04 14:07:01 +08:00
wuzhenghui 48ba430297 change(esp_hal_rtc_timer): unify lp_timer/rtc_timer naming to RTC_TIMER 2025-12-30 11:35:36 +08:00
Song Ruo Jing e0d3cc040d refactor(uart): clean up uart soc_caps 2025-12-25 14:52:11 +08:00
Song Ruo Jing 643b2508fa refactor(uart): remove soc/uart_channel.h 2025-12-25 14:42:43 +08:00
Song Ruo Jing 74aeb3f41f refactor(uart): split UART HAL into separate component 2025-12-25 14:41:28 +08:00
liuning ea2829f856 bugfix(wifi): fix incomplete phy initialization due to absence of bb clocks at coexistence scenarios 2025-12-24 20:15:48 +08:00
hebinglin 7cba4c8c4c feat(esp_hw_support): support clock output in esp32h4 mp 2025-12-24 10:50:34 +08:00
Song Ruo Jing a3c63f362b Merge branch 'refactor/esp_hal_ledc' into 'master' 
refactor(ledc): split ledc hal into a separate component

Closes IDF-14085

See merge request espressif/esp-idf!44204
 2025-12-18 11:59:25 +08:00
Erhan Kurubas b42e3f01d0 Merge branch 'esp32h4_debug_asistant' into 'master' 
feat(esp32h4): add assist_debug/bus_monitor support

Closes IDF-12592

See merge request espressif/esp-idf!44014
 2025-12-17 21:19:25 +01:00
Michael (XIAO Xufeng) 32c31f68c8 Merge branch 'bugfix/esp32c5_encrypted_flash_write' into 'master' 
fix(spi_flash): Add CPU frequency switching during flash encrypted write

See merge request espressif/esp-idf!43032
 2025-12-17 21:48:05 +08:00
Chen Ji Chang df5f1e2b5e Merge branch 'fix/update_breakpoint_nums_on_c5_h4' into 'master' 
fix(soc): update breakpoint nums on c5 and h4

See merge request espressif/esp-idf!44270
 2025-12-17 20:31:51 +08:00
Erhan Kurubas bdcfbd3c05 feat(esp32h4): add assist_debug stack monitoring support 2025-12-17 10:11:36 +01:00
Song Ruo Jing 67a738d1de refactor(ledc): split ledc hal into a separate component 2025-12-17 15:26:10 +08:00
Xiao Xufeng 230ee88d99 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes 
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
 2025-12-16 17:42:44 +08:00
morris 1f04dbb31b Merge branch 'refactor/remove_completed_todos' into 'master' 
refactor(global): remove completed todos in the codebase

See merge request espressif/esp-idf!44188
 2025-12-16 14:21:25 +08:00
Chen Jichang 6ff2ff2c6c fix(soc): update breakpoint nums on c5 and h4 2025-12-16 12:10:56 +08:00
Chen Chen 3cf86e260c refactor(esp_system): clear dependency on hal components 2025-12-15 22:56:09 +08:00
morris 291554cd09 refactor(global): remove completed todos in the codebase 2025-12-15 22:40:15 +08:00
Kevin (Lao Kaiyao) b33c9cd7ce Merge branch 'feature/support_touch_sensor_on_h4' into 'master' 
feat(touch_sens): support touch sensor on H4

Closes IDF-13941

See merge request espressif/esp-idf!41511
 2025-12-15 20:58:32 +08:00
Wan Lei a633083633 Merge branch 'fix/spi_clean_soc_caps' into 'master' 
refactor(driver_spi): clean spi soc caps

See merge request espressif/esp-idf!44083
 2025-12-15 20:48:21 +08:00
laokaiyao 1e54a82e42 feat(touch_sens): support touch sensor on esp32h4 2025-12-15 11:18:37 +08:00
C.S.M 07519fac25 fix(spi_flash): Cleanup jira tickets 2025-12-12 17:53:01 +08:00
wanckl 13e1ae57e1 refactor(driver_spi): clean spi soc caps 2025-12-12 11:29:42 +08:00
wanckl 6449181ce0 feat(driver_spi): split spi hal component 2025-12-11 15:00:18 +08:00
Chen Ji Chang 69a5730f34 Merge branch 'feat/support_parlio_on_esp32h4' into 'master' 
feat(parlio): support parlio on esp32h4

Closes IDF-12345, IDF-12346, and IDF-12347

See merge request espressif/esp-idf!43683
 2025-12-05 15:09:02 +08:00
Chen Jichang a67517067c feat(parlio): support parlio on esp32h4 2025-12-04 11:45:18 +08:00
morris af02c173fb refactor(soc): remove soc_caps_full.h 2025-12-04 10:48:07 +08:00
morris ab4200e6f6 feat(twai): graduate the hal drivers into esp_hal_twai component 2025-12-01 22:32:54 +08:00
morris 580d9bca57 Merge branch 'refactor/esp_hal_gpio' into 'master' 
refactor(gpio): split GPIO HAL into separate component

Closes IDF-14089

See merge request espressif/esp-idf!43215
 2025-12-01 10:40:07 +08:00
Jaroslav Burian da18980ff0 change: Modify license of soc component 
License of soc component is changed from Apache-2.0 to Apache-2.0 OR MIT
to be able to use it in esp-stub-lib
 2025-11-28 10:32:05 +01:00
Song Ruo Jing 06970a5284 refactor(esp_hal_gpio): move some caps definitions to esp_hal_gpio 2025-11-26 15:35:27 +08:00
Song Ruo Jing 1862fdec74 refactor(gpio): split GPIO HAL into separate component 
cleaned up some includes in GPIO peripheral files
 2025-11-26 15:35:07 +08:00
Shu Chen 5e33abd510 Merge branch 'feat/support_154_for_h4' into 'master' 
feat(802.15.4): supported 802.15.4 for esp32h4

See merge request espressif/esp-idf!43148
 2025-11-26 03:52:37 +00:00
Chen Jichang 2cb84ecf95 feat(hal): graudate the RMT hal driver into a new component 2025-11-25 14:21:01 +08:00
morris c7f4c62e00 Merge branch 'refactor/bitscrambler_in_esp_hal_dma' into 'master' 
refactor(hal): bitscrambler hal -> esp_hal_dma, usj hal -> esp_hal_usb

Closes IDF-14353

See merge request espressif/esp-idf!43542
 2025-11-25 13:06:26 +08:00
zhuanghang ceef28fe9e feat(802.15.4): supported 802.15.4 for esp32h4 2025-11-24 10:39:01 +08:00
Konstantin Kondrashov 0084024973 feat(systimer): Support systimer/esp_timer/OS tick for esp32h4 2025-11-21 15:18:43 +02:00
morris bc064a353a refactor(hal_dma): move bitscrambler from hal component 
because bitscrambler can't live without DMA, it's highly binded with the
GDMA peripheral.
 2025-11-21 16:10:16 +08:00
morris c48a08803f Merge branch 'feat/dedic_gpio_esp32h4' into 'master' 
feat(gpio): support fast gpio driver on esp32h4

Closes IDF-12401 and IDF-12391

See merge request espressif/esp-idf!43472
 2025-11-20 15:24:28 +08:00
laokaiyao 873d90218c refactor(parlio): refactor of the private parlio caps 2025-11-19 14:32:40 +08:00